Search Results - "Hemani, Ahmed"
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1
Guest Editorial: Special Issue on Architectures and Design Methods for Neural Networks
Published in Journal of signal processing systems (01-11-2020)Get full text
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Automating functional unit and register binding for synchoros CGRA platform
Published in Design automation for embedded systems (01-06-2024)“…Coarse-grain reconfigurable architectures, which provide high computing throughput, low cost, scalability, and energy efficiency, have grown in popularity in…”
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Integer Linear Programming-Based Simultaneous Scheduling and Binding for SiLago Framework
Published in IEEE access (2024)“…Coarse-Grained Reconfigurable Array (CGRA) architectures are potential high-performance and power-efficient platforms. However, mapping applications…”
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Optimizing BCPNN Learning Rule for Memory Access
Published in Frontiers in neuroscience (31-08-2020)“…Simulation of large scale biologically plausible spiking neural networks, e.g., Bayesian Confidence Propagation Neural Network (BCPNN), usually requires…”
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Mapping the BCPNN Learning Rule to a Memristor Model
Published in Frontiers in neuroscience (09-12-2021)“…The Bayesian Confidence Propagation Neural Network (BCPNN) has been implemented in a way that allows mapping to neural and synaptic processes in the human…”
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Application Level Synthesis: Creating Matrix-Matrix Multiplication Library: A Case Study
Published in IEEE access (2024)“…Efficiently synthesizing an entire application that consists of multiple algorithms for hardware implementation is a very difficult and unsolved problem. One…”
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eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex
Published in Journal of signal processing systems (2020)“…The Artificial Neural Networks (ANNs), like CNN/DNN and LSTM, are not biologically plausible. Despite their initial success, they cannot attain the cognitive…”
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DUDE: Decryption, Unpacking, Deobfuscation, and Endian Conversion Framework for Embedded Devices Firmware
Published in IEEE transactions on dependable and secure computing (01-07-2024)“…Commercial-Off-The-Shelf (COTS) embedded devices rely on vendor-specific firmware to perform essential tasks. These firmware have been under active analysis by…”
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Guest Editorial: Special Issue on Architectures and Design Methods for Neural Networks
Published in Journal of signal processing systems (16-07-2020)Get full text
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Reducing the Configuration Overhead of the Distributed Two-level Control System
Published in 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE) (14-03-2022)“…With the growing demand for more efficient hardware accelerators for streaming applications, a novel Coarse-Grained Reconfigurable Architecture (CGRA) that…”
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Conference Proceeding -
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Scalable Multi-FPGA HPC Architecture for Associative Memory System
Published in IEEE transactions on biomedical circuits and systems (20-08-2024)“…Associative memory is a cornerstone of cognitive intelligence within the human brain. The Bayesian confidence propagation neural network (BCPNN), a…”
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PCSS: Privacy Preserving Communication Scheme for SDN Enabled Smart Homes
Published in IEEE sensors journal (15-09-2022)“…Smart home technology, also known as home automation system, allows the homeowner and residents to control and monitor the smart devices like heating,…”
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Clock tree generation by abutment in synchoros VLSI design
Published in Microprocessors and microsystems (01-10-2023)“…Synchoros VLSI design style has been proposed as an alternative to standard cell-based design. Standard cells are replaced by synchoros, large grain, VLSI…”
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Modeling Cycle-to-Cycle Variation in Memristors for In-Situ Unsupervised Trace-STDP Learning
Published in IEEE transactions on circuits and systems. II, Express briefs (01-02-2024)“…Evaluating the computational accuracy of Spiking Neural Network (SNN) implemented as in-situ learning on large-scale memristor crossbars remains a challenge…”
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A Memristor-Based Learning Engine for Synaptic Trace-Based Online Learning
Published in IEEE transactions on biomedical circuits and systems (01-10-2023)“…The memristor has been extensively used to facilitate the synaptic online learning of brain-inspired spiking neural networks (SNNs). However, the current…”
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Configurable FFT Processor Using Dynamically Reconfigurable Resource Arrays
Published in Journal of signal processing systems (15-05-2019)“…This paper presents results of using a Coarse Grain Reconfigurable Architecture called DRRA (Dynamically Reconfigurable Resource Array) for FFT implementations…”
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Quality-of-service-aware adaptation scheme for multi-core protocol processing architecture
Published in Microprocessors and microsystems (01-10-2017)“…Employing adaptable protocol processing architectures has shown a high potential in provisioning Quality-of-Service (QoS) while retaining efficient use of…”
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NACU: A Non-Linear Arithmetic Unit for Neural Networks
Published in 2020 57th ACM/IEEE Design Automation Conference (DAC) (01-07-2020)“…Reconfigurable architectures targeting neural networks are an attractive option. They allow multiple neural networks of different types to be hosted on the…”
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Conference Proceeding -
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DRRA-based Reconfigurable Architecture for Mixed-Radix FFT
Published in 2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID) (01-01-2023)“…Fast-Fourier Transform is an important algorithm which is used in digital signal processing and communication applications. Furthermore, mixed-radix FFT…”
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Conference Proceeding -
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Addressing dynamic issues in information security management
Published in Information management & computer security (2011)“…Purpose - The purpose of this paper is to address three main problems resulting from uncertainty in information security management: dynamically changing…”
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