Search Results - "Heijmen, Tino"

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  1. 1

    Symmetry-adapted perturbation theory applied to interaction-induced properties of collisional complexes by HEIJMEN, TINO G. A., MOSZYNSKI, ROBERT, WORMER, PAUL E. S., VAN DER AVOIRD, AD

    Published in Molecular physics (01-09-1996)
    “…A symmetry-adapted perturbation theory (SAPT) is formulated for interaction-induced electrical properties of weakly bound complexes. Asymptotic (large R)…”
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    Journal Article
  2. 2

    Alpha-particle-induced SER of embedded SRAMs affected by variations in process parameters and by the use of process options by Heijmen, Tino, Kruseman, Bram

    Published in Solid-state electronics (01-11-2005)
    “…We investigate the alpha-particle-induced soft-error rate (SER) of embedded SRAMs with a focus on the spread in SER owing to variations in the process…”
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    Journal Article Conference Proceeding
  3. 3

    Second dielectric virial coefficient of helium gas: quantum-statistical calculations from an ab initio interaction-induced polarizability by Moszynski, Robert, Heijmen, Tino G.A., Avoird, Ad van der

    Published in Chemical physics letters (29-12-1995)
    “…A quantum-statistical expression for the second virial coefficient of the dielectric Clausius-Mossotti function is derived. Calculations of the second…”
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    Journal Article
  4. 4

    A Comparative Study on the Soft-Error Rate of Flip-Flops from 90-nm Production Libraries by Heijmen, T., Roche, P., Gasiot, G., Forbes, K.R.

    “…This paper presents a study using alpha- and neutron-accelerated tests to characterize soft error rates (SER) of flip-flops that are used in 90-nm CMOS…”
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    Conference Proceeding
  5. 5

    Special Session 3 - Panel: SER in Automotive: what is the impact of the AEC Q100-G spec? by Heijmen, Tino

    “…Summary form only given, as follows. A record of the panel discussion was not made available for publication as part of the conference proceedings. In May 2007…”
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    Conference Proceeding
  6. 6

    Soft-Error Vulnerability of Sub-100-nm Flip-Flops by Heijmen, T.

    “…The soft-error vulnerability of flip-flops has become an important factor in IC reliability in sub-100-nm CMOS technologies. In the present work the soft-error…”
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    Conference Proceeding
  7. 7

    Spread in Alpha-Particle-Induced Soft-Error Rate of 90-nm Embedded SRAMs by Heijmen, T.

    “…In the accelerated soft-error rate (SER) testing of embedded SRAMs usually only a few samples of a given device are tested, often only for a checkerboard data…”
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    Conference Proceeding
  8. 8

    A Comprehensive Study on the Soft-Error Rate of Flip-Flops From 90-nm Production Libraries by Heijmen, T., Roche, P., Gasiot, G., Forbes, K.R., Giot, D.

    “…This paper presents a study using alpha- and neutron-accelerated tests to characterize the soft error rate (SER) of flip-flops (FFs) that are used in 90-nm…”
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    Magazine Article
  9. 9

    Factors that impact the critical charge of memory elements by Heijmen, T., Giot, D., Roche, P.

    “…In the current paper we investigate the factors that affect the critical charge (Q crit ) for a soft error in a memory cell. Also the spread of Q crit due to…”
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    Conference Proceeding
  10. 10
  11. 11

    Technology scaling of critical charges in storage circuits based on cross-coupled inverter-pairs by Heijmen, T., Kruseman, B., van Veen, R., Meijer, M.

    “…Soft error rate is an important reliability issue in deep-submicron IC design. Crucial is the impact of technology scaling on the critical charges of SRAM…”
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    Conference Proceeding
  12. 12

    Soft error rates in deep-submicron CMOS technologies by Heijmen, T.

    “…With ongoing technology scaling, reliability is becoming increasingly important for integrated circuits (ICs) manufactured in deep-submicron CMOS technologies…”
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    Conference Proceeding
  13. 13

    Analytical semi-empirical model for SER sensitivity estimation of deep-submicron CMOS circuits by Heijmen, T.

    “…An analytical expression is proposed for the estimation of the soft-error rate (SER) sensitivity of circuits designed in deep-submicron CMOS technologies. The…”
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    Conference Proceeding
  14. 14

    Altitude and underground real-time SER tests of embedded SRAM by Heijmen, T., Verwijst, J.

    “…Real-time SER tests have been performed on embedded SRAMs in a 0.13-μm process technology. 511 samples of a product IC have been tested at two locations…”
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    Conference Proceeding
  15. 15

    Soft-Error Rate Testing of Deep-Submicron Integrated Circuits by Heijmen, T., Nieuwland, A.

    “…Soft errors induced by radiation pose a major challenge for the reliability of complex chips processed in state-of-the-art technologies. This paper reviews…”
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    Conference Proceeding