Search Results - "Hazarika, Jinti"
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Moving Window Filter Based Frequency-Locked Loop for Capacitance Measurement
Published in IEEE transactions on industrial electronics (1982) (01-12-2015)“…The proposed frequency-locked loop (FLL) utilizes the flat frequency response characteristics of the moving window filter (MWF) in closed-loop and adaptive…”
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Journal Article -
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Low‐complexity, energy‐efficient fully parallel split‐radix FFT architecture
Published in Electronics letters (01-08-2022)“…Fully parallel pipelined fast Fourier transform offers the highest throughput but requires high area and power. In this work, an efficient fast Fourier…”
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3
An Area and Energy Efficient Serial-Multiplier
Published in IEEE embedded systems letters (2024)Get full text
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A Novel Time-Shared and LUT-Less Pipelined Architecture for LMS Adaptive Filter
Published in IEEE transactions on very large scale integration (VLSI) systems (01-01-2020)“…This article presents a novel time-shared and lookup table (LUT)-less pipelined architecture for a least-mean-square (LMS) adaptive filter (ADF). The proposed…”
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Journal Article -
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An Efficient Implementation Approach to FFT Processor for Spectral Analysis
Published in IEEE transactions on instrumentation and measurement (01-01-2023)“…This paper presents an efficient hardware implementation approach to a variable-size fast Fourier transform processor for spectral analysis. Due to its…”
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Low-Area and Low-Power VLSI Architectures for Long Short-Term Memory Networks
Published in IEEE journal on emerging and selected topics in circuits and systems (01-12-2023)“…Long short-term memory (LSTM) networks are extensively used in various sequential learning tasks, including speech recognition. Their significance in…”
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Low-Complexity Continuous-Flow Memory-Based FFT Architectures for Real-Valued Signals
Published in 2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID) (01-01-2019)“…This paper presents two low-complexity continuous-flow memory-based fast Fourier transform (FFT) architectures (Type-I, II) for real-valued signals. Both the…”
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Conference Proceeding -
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Energy efficient VLSI architecture of real‐valued serial pipelined FFT
Published in Chronic diseases and translational medicine (01-11-2019)“…This study presents an energy‐efficient serial pipelined architecture of fast Fourier transform (FFT) to process real‐valued signals. A new data mapping scheme…”
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High Performance Multiplierless Serial Pipelined VLSI Architecture for Real-Valued FFT
Published in 2019 National Conference on Communications (NCC) (01-02-2019)“…This paper presents a high-performance multiplierless serial pipelined architecture for real-valued fast Fourier transform (FFT). A new data mapping scheme…”
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Conference Proceeding