Search Results - "Han, Kwangseok"
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1
A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor
Published in IEEE transactions on circuits and systems. I, Regular papers (01-03-2017)“…This paper describes a 28-Gb/s receiver IC with self-contained adaptive equalization and sampling point control using an on-chip stochastic sigma-tracking…”
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2
A Fully Integrated Low-Power High-Coexistence 2.4-GHz ZigBee Transceiver for Biomedical and Healthcare Applications
Published in IEEE transactions on microwave theory and techniques (01-09-2014)“…A fully integrated low-power high-coexistence 2.4-GHz ZigBee transceiver implemented in 90-nm CMOS technology is demonstrated. The two-point direct-modulation…”
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3
A 0.87 W Transceiver IC for 100 Gigabit Ethernet in 40 nm CMOS
Published in IEEE journal of solid-state circuits (01-02-2015)“…This paper describes a low-power 100 Gigabit Ethernet transceiver IC compliant with IEEE802.3ba 100GBASE-LR4 in 40 nm CMOS. The proposed bidirectional…”
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4
The impact of semiconductor technology scaling on CMOS RF and digital circuits for wireless application
Published in IEEE transactions on electron devices (01-07-2005)“…The impact of CMOS technology scaling on the various radio frequency (RF) circuit components such as active, passive and digital circuits is presented…”
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5
A Power-and-Area Efficient 10\times 10 Gb/s Bootstrap Transceiver in 40 nm CMOS for Referenceless and Lane-Independent Operation
Published in IEEE journal of solid-state circuits (01-10-2016)“…A phase interpolator (PI)-based 10 × 10 Gb/s bootstrap transceiver for referenceless and lane-independent operation is presented. PI output clock signals phase…”
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6
A 103.125-Gb/s Reverse Gearbox IC in 40-nm CMOS for Supporting Legacy 10- and 40-GbE Links
Published in IEEE journal of solid-state circuits (01-03-2017)“…This paper presents the first 103.125-Gb/s multilink gearbox (MLG) IC, which facilitates the transport of independent 10and 40-GbE signals to 4 × 25.78 Gb/s…”
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7
An Automatic Loop Gain Control Algorithm for Bang-Bang CDRs
Published in IEEE transactions on circuits and systems. I, Regular papers (01-12-2015)“…An automatic loop gain control algorithm (ALGC) for a bang-bang (BB) clock and data recovery (CDR) is proposed. The proposed algorithm finds the optimum loop…”
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8
Analytical drain thermal noise current model valid for deep submicron MOSFETs
Published in IEEE transactions on electron devices (01-02-2004)“…In this paper, a physics-based MOSFET drain thermal noise current model valid for deep submicron channel lengths was derived and verified with experiments. It…”
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9
Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier
Published in IEEE journal of solid-state circuits (01-03-2005)“…Taking a velocity saturation effect and a carrier heating effect in the gradual channel region, complete thermal noise modeling of short-channel MOSFETs…”
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10
An on-chip stochastic sigma-tracking eye-opening monitor for BER-optimal adaptive equalization
Published in 2015 IEEE Custom Integrated Circuits Conference (CICC) (01-09-2015)“…An on-chip stochastic sigma-tracking eye-opening monitor (SSEOM) for background adaptive equalization is presented. The proposed SSEOM detects the BER-related…”
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Conference Proceeding -
11
Characteristics of p-channel Si nano-crystal memory
Published in IEEE transactions on electron devices (01-05-2001)“…In this work, the feasibility of p-channel nano-crystal memory with thin oxide in direct tunneling regime is demonstrated. By comparing the programming…”
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12
Room temperature single electron effects in a Si nano-crystal memory
Published in IEEE electron device letters (01-12-1999)“…An MOS memory based on Si nano-crystals has been fabricated. We have developed a repeatable process of forming uniform, small-size and high-density Si…”
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13
Drain current thermal noise modeling for deep submicron n- and p-channel MOSFETs
Published in Solid-state electronics (01-12-2004)“…The drain current thermal noise has been measured and modeled for the short-channel devices fabricated with a standard 0.18 μm CMOS technology. We have derived…”
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14
Programming characteristics of p-channel Si nano-crystal memory
Published in IEEE electron device letters (01-06-2000)“…In this work, the programming characteristics of a p-channel nano-crystal memory is studied. The hole tunneling component from the inversion layer and the…”
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15
A New Physical RF Model of Junction Varactors
Published in Japanese Journal of Applied Physics (2003)Get full text
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16
Si Nanocrystal Memory Cell with Room-Temperature Single Electron Effects
Published in Japanese Journal of Applied Physics (01-02-2001)“…A metal oxide semiconductor (MOS) memory based on Si nanocrystals has been fabricated. We have developed a repeatable process for forming uniform, small and…”
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17
A power-and-area efficient 10 × 10 Gb/s bootstrap transceiver in 40 nm CMOS for reference-less and lane-independent operation
Published in 2015 IEEE Custom Integrated Circuits Conference (CICC) (01-09-2015)“…A phase interpolator (PI)-based 10 × 10 Gb/s bootstrap transceiver for reference-less and lane-independent operation is presented. PI output clock signals that…”
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Conference Proceeding -
18
A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards
Published in 2015 Symposium on VLSI Circuits (VLSI Circuits) (01-06-2015)“…This paper presents the industry's first low-power 100-Gigabit Ethernet (GbE) multi-link gearbox (MLG) IC, which facilitates transport of independent 10-GbE…”
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Conference Proceeding Journal Article -
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Thermal noise modeling for short-channel MOSFETs
Published in International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003 (2003)“…In this work, a physics-based MOSFET drain thermal noise current model valid for all channel lengths was presented for the first time. The derived model was…”
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Conference Proceeding -
20
Characteristics of P-channel Si nano-crystal memory
Published in Proceedings of IEEE. IEEE Region 10 Conference. TENCON 99. 'Multimedia Technology for Asia-Pacific Information Infrastructure' (Cat. No.99CH37030) (1999)“…The nano-crystal memory operates at low voltage compared to conventional flash memory due to thinner tunneling dielectrics, since the spacing between the Si…”
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Conference Proceeding