Search Results - "Hall, Mary W."
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Maximizing multiprocessor performance with the SUIF compiler
Published in Computer (Long Beach, Calif.) (01-12-1996)“…This article describes automatic parallelization techniques in the SUIF (Stanford University Intermediate Format) compiler that result in good multiprocessor…”
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Custom Data Layout for Memory Parallelism
Published in Code Generation and Optimization: Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization; 20-24 Mar. 2004 (20-03-2004)“…In this paper, we describe a generalized approach toderiving a custom data layout in multiple memory banksfor array-based computations, to facilitate…”
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Conference Proceeding -
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Empirical Optimization for a Sparse Linear Solver: A Case Study
Published in International journal of parallel programming (01-06-2005)“…This paper describes initial experiences with semi-automated performance tuning of a sparse linear solver in LS-DYNA, a large, widely used engineering…”
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Evaluating automatic parallelization in SUIF
Published in IEEE transactions on parallel and distributed systems (01-01-2000)“…This paper presents the results of an experiment to measure empirically the remaining opportunities for exploiting loop-level parallelism that are missed by…”
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Compiler-generated communication for pipelined FPGA applications
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 40th conference on Design automation; 02-06 June 2003 (02-06-2003)“…In this paper, we describe a set of compiler analyses and an implementation that automatically map a sequential and un-annotated C program into a pipelined…”
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Conference Proceeding -
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Using estimates from behavioral synthesis tools in compiler-directed design space exploration
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 40th conference on Design automation; 02-06 June 2003 (02-06-2003)“…This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system…”
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Conference Proceeding -
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Adaptive parallelism in compiler-parallelized code
Published in Concurrency (Chichester, England.) (10-12-1998)“…As moderate‐scale multiprocessors become widely used, we foresee an increased demand for effective compiler parallelization and efficient management of…”
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Characterizing the memory behavior of compiler-parallelized applications
Published in IEEE transactions on parallel and distributed systems (01-12-1996)“…Compiler-parallelized applications are increasing in importance as moderate-scale multiprocessors become common. This paper evaluates how features of advanced…”
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Multiprocessors from a software perspective
Published in IEEE MICRO (01-06-1996)“…Like many architectural techniques that originated with mainframes. the use of multiple processors in a single computer is becoming popular in workstations and…”
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Self-Configuring Applications for Heterogeneous Systems: Program Composition and Optimization Using Cognitive Techniques
Published in Proceedings of the IEEE (01-05-2008)“…This paper describes several challenges facing programmers of future edge computing systems, the diverse many-core devices that will soon exemplify commodity…”
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Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures
Published in PACT: Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques; 22-25 Sept. 2002 (22-09-2002)“…In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel's SSE and Motorola's…”
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Conference Proceeding -
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Memory referencing behavior in compiler-parallelized applications
Published in International journal of parallel programming (01-08-1996)“…Compiler-parallelized applications are increasing in importance as moderate-scale multiprocessors become common. An evaluation of how features of advanced…”
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Journal Article -
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Evaluating compiler technology for control-flow optimizations for multimedia extension architectures
Published in Microprocessors and microsystems (01-06-2009)“…This paper addresses how to automatically generate code for multimedia extension architectures in the presence of conditionals. We evaluate the costs and…”
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Understanding the Behavior of Pthread Applications on Non-Uniform Cache Architectures
Published in 2011 International Conference on Parallel Architectures and Compilation Techniques (01-10-2011)“…Future scalable multi-core chips are expected to implement a shared last-level cache (LLC) with banks distributed on chip, forcing a core to incur non-uniform…”
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Procedure cloning
Published in Computer Languages, 1992 International Conference (ICCL '92) (1992)“…Procedure cloning is an interprocedural optimization where the compiler creates specialized copies of procedure bodies. The authors examine the problem of…”
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The ParaScope parallel programming environment
Published in Proceedings of the IEEE (01-02-1993)“…The ParaScope parallel programming environment, developed to support scientific programming of shared-memory multiprocessors, is described. It includes a…”
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Interprocedural Compilation of Fortran D
Published in Journal of parallel and distributed computing (01-11-1996)“…Fortran D is a version of Fortran extended with data decomposition specifications. It is designed to provide a machine-independent programming model for…”
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The potential of computation reuse in high-level optimization of a signal recognition system
Published in 2008 IEEE International Symposium on Parallel and Distributed Processing (01-04-2008)“…This paper evaluates the potential of exploiting computation reuse in a signal recognition system that is jointly optimized from mathematical representation,…”
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Conference Proceeding