Search Results - "Guo, Yuekang"

A Power-Efficient SAR ADC with Optimized Timing-Redistribution Asynchronous SAR Logic in 40-nm CMOS by Hu, Mengying, Jin, Jing, Guo, Yuekang, Liu, Xiaoming, Zhou, Jianjun

“…This paper presents a power-efficient successive-approximation register (SAR) analog-to-digital converter (ADC) with fast response reference buffer…”
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A 372 μW 10 kHz-BW 109.2 dB-SNDR Nested Delta-Sigma Modulator Using Hysteresis-Comparison MSB-Pass Quantization by Guo, Yuekang, Jin, Jing, Liu, Xiaoming, Zhou, Jianjun

“…This article presents a nested delta-sigma modulator (DSM) structure, where an inner analog DSM is embedded in an outer analog-digital-hybrid DSM. The outer…”
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A 60-MS/s 5-MHz BW Noise-Shaping SAR ADC With Integrated Input Buffer Achieving 84.2-dB SNDR and 97.3-dB SFDR Using Dynamic Level-Shifting and ISI-Error Correction by Guo, Yuekang, Jin, Jing, Liu, Xiaoming, Zhou, Jianjun

“…This article presents a 60-MS/s 5-MHz BW noise-shaping (NS) successive-approximation-register (SAR) analog-to-digital converter (ADC) with an integrated highly…”
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An 18.1 mW 50 MHz-BW 76.4 dB-SNDR CTSDM With PVT-Robust VCO Quantizer and Latency-Free Background-Calibrated DAC by Guo, Yuekang, Jin, Jing, Liu, Xiaoming, Zhou, Jianjun

“…This paper presents a continuous-time sigma-delta modulator (CTSDM) with a voltage-controlled-oscillator-based (VCO-based) integrating quantizer. A background…”
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An Inverter-Based Continuous Time Sigma Delta ADC With Latency-Free DAC Calibration by Guo, Yuekang, Jin, Jing, Liu, Xiaoming, Zhou, Jianjun

“…This paper presents a wide bandwidth inverter-based continuous time sigma delta (CTSD) analog-to-digital converter (ADC) with a latency-free calibration to…”
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A Fast-Settling Phase-Locked Loop Utilizing Cycle-Slipping-Elimination PFDCP by Yang, Chao, Liu, Xiaoming, Jin, Jing, Guo, Yuekang, Zhou, Jianjun

“…A fast-settling phase-locked loop (PLL) adopting the cycle-slipping-elimination phase frequency detector and charge pump (CSE-PFDCP) is presented. The…”
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Area-Efficient 28-GHz Four-Element Phased-Array Transceiver Front-End Achieving 25.2% Tx Efficiency at 15.68-dBm Output Power by Liu, Xiaoming, Yang, Chao, Yang, Zhaolin, Guo, Yuekang, Jin, Jing, Shi, Liyun, Xu, Qihao, Wu, Linsheng, Zhou, Jianjun

“…An area-efficient 28-GHz four-element phased-array transceiver front-end (TRx FE) is proposed in this article. Transmitter/receiver (T/R) switch, phase shifter…”
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A Harmonic Rejecting N-Path Filter with Harmonic Gain Calibration Technique by Bu, Ran, Jin, Jing, Yang, Zhaolin, Guo, Yuekang, Zhou, Jianjun

“…In this paper, an improved harmonic rejecting N -path filter with a circuit-level structure is proposed. A different set of mixing functions is introduced to…”
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A 0.83-pJ/b 20-Gb/s/Pin Single-Ended Transceiver With AC/DC-Coupled Pre-Emphasis FFE and Edge-Dependent Phase-Modulation DFE for Low-Power Memory Controllers by Wang, Xiaofei, Jin, Jing, Liu, Xiaoming, Wang, Hui, Tang, Huzhi, Yang, Chao, Guo, Yuekang, Mo, Tingting, Zhou, Jianjun

“…This article presents an energy-efficient single-ended transceiver featuring the proposed AC/DC-coupled pre-emphasis feed-forward equalizer (PE-FFE) and…”
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Analysis of SAR ADC Quantization Error and Nonlinearity in PMCW Automotive Radar by Zhong, Tao, Guo, Yuekang, Jin, Jing

“…The phase-modulated continuous wave (PMCW) radar puts forward stringent requirements on the analog-to-digital converter (ADC) for its high intermediate…”
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A Low Power PVT Stabilization Technique for Dynamic Amplifier in Pipelined SAR ADC by Guo, Yuekang, Jin, Jing, Zhou, Jianjun

“…This paper presents a low power technique to solve the gain variation problem of the dynamic amplifiers in pipelined SAR ADCs. To detect and correct the gain…”
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A LUT-based Background Linearization Technique for VCO-based ADC Employing K}-\text-\text by Guo, Yuekang, Jin, Jing, Liu, Xiaoming, Yang, Zhaolin, Zhou, Jianjun

“…This paper proposes a look-up-table (LUT)-based background calibration to improve the linearity of the ring voltage-controlled oscillator (VCO)-based…”
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A Power-Efficient CMOS Image Sensor with In-Sensor Processing and In-Pixel Gain Calibration by Wu, Ke, Guo, Yuekang, Jin, Jing, Liu, Xiaoming, Zhou, Jianjun

“…This paper presents a power-efficient CMOS Image Sensor (CIS) with in-sensor computation and in-pixel gain calibration. The CIS can output 32\times 32 image or…”
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A 3bit/cycle 1GS/s 8-bit SAR ADC Employing Asynchronous Ping-Pong Quantization Scheme by Guo, Yuekang, Liu, Xiaoming, Jin, Jing, Zhou, Jianjun

“…This paper presents a 3bit/cycle 1GS/s8-bit SAR ADC with asynchronous ping-pong quantization scheme. With the proposed scheme, settling requirement of the…”
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A Self-Calibrated Sampling Noise Cancellation Technique for Noise-Shaping SAR ADC by Lou, Zhengyuan, Xu, Meng, Guo, Yuekang, Jin, Jing, Zhou, Jianjun

“…The sampling noise cancellation (SNC) technique has been applied to noise-shaping SAR (NS-SAR) ADCs to reduce the sampling capacitance, which makes the ADCs…”
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A 470μW 20kHz-BW 107.3dB-SNDR Nested CT DSM Employing Negative-R-Based Cross-RC Filter and Weighted Multi-Threshold MSB-Pass Quantizer by Jin, Jing, Guo, Yuekang, Xu, Meng, Liu, Xiaoming, Sun, Nan, Zhou, Jianjun

“…Many loT applications require high-resolution delta-sigma modulator (DSM) ADCs with good power efficiency. To meet this demand, one current technical trend…”
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A Linearization Technique for Ring VCO Exploiting Bulk-Modulation by Pan, Qiang, Guo, Yuekang, Jin, Jing, Zhou, Jianjun

“…This paper presents a power-efficient linearization technique based on bulk-modulation for the voltage-to-frequency conversion characteristic of the ring…”
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A Center Frequency Calibration Technique for Ring VCO Exploiting Delay−1 Detection by Guo, Yuekang, Pan, Qiang, Liu, Xiaoming, Jin, Jing

“…This paper presents a technique to detect and correct the variation of the center frequency of ring voltage-controlled oscillator (VCO) with process, voltage…”
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A Latency-Optimized Lookup Table for Nonlinearity Calibration in VCO-Based Sigma-Delta ADCs by He, Yanlin, Guo, Yuekang, Jin, Jing, Zhou, Jianjun

“…The long latency feature of the conventional lookup tables (LUTs) puts a limit on their applications in a VCO-based continuous-time sigma-delta (CTSD)…”
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A Phase Domain Excess Loop Delay Compensation Technique with Latency Optimized Phase Selector for VCO-Based Continuous-Time ΔΣ ADC by Guo, Yuekang, Jin, Jing, Liu, Xiaoming, Zhou, Jianjun

“…This paper presents a phase domain excess loop delay compensation (ELDC) technique for voltage-controlled oscillator-based (VCO-based) continuous time (CT) ΔΣ…”
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