Search Results - "Guan-Shyan Lin"

Shallow-Trench-Isolation (STI)-Induced Mechanical-Stress-Related Kink-Effect Behaviors of 40-nm PD SOI NMOS Device by Su, V.C., Kuo, J.B., Lin, I.S., Guan-Shyan Lin, Chen, D.C., Chune-Sin Yeh, Cheng-Tzung Tsai, Ma, M.

“…This brief reports the shallow-trench-isolation (STI)-induced mechanical-stress-related kink-effect behaviors of the 40-nm PD silicon on insulator (SOI) NMOS…”
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Improved Characterization Methodology of Gate-Bulk Leakage and Capacitance for Ultrathin Oxide Partially Depleted SOI Floating-Body CMOS by Chen, D. C., Lee, R., Yuan-Chang Liu, Guan-Shyan Lin, Mao-Chyuan Tang, Meng-Fan Wang, Chune-Sin Yeh, Shan-Chieh Chien

“…Device scaling of partially depleted (PD) silicon-on-insulator (SOI) has the potential to increase speed. However, the increased gate tunneling and capacitance…”
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Quasi-planar bulk CMOS technology for improved SRAM scalability by Shin, Changhwan, Tsai, Chen Hua, Wu, Mei Hsuan, Chang, Chung Fu, Liu, You Ren, Kao, Chih Yang, Lin, Guan Shyan, Chiu, Kai Ling, Fu, Chuan-Shian, Tsai, Cheng-tzung, Liang, Chia Wen, Nikolić, Borivoje, Liu, Tsu-Jae King

“…A simple approach for manufacturing quasi-planar bulk MOSFET structures is demonstrated and shown to be effective not only for improving device performance but…”
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Tri-gate bulk CMOS technology for improved SRAM scalability by Changhwan Shin, Nikolić, Borivoje, Tsu-Jae King Liu, Chen Hua Tsai, Mei Hsuan Wu, Chung Fu Chang, You Ren Liu, Chih Yang Kao, Guan Shyan Lin, Kai Ling Chiu, Chuan-Shian Fu, Cheng-tzung Tsai, Chia Wen Liang

“…A simple approach for manufacturing quasi-planar tri-gate bulk MOSFET structures is demonstrated and shown to be effective for reducing variation in 6T-SRAM…”
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Efficient Characterization Methodology of Gate-Bulk Leakage and Capacitance for Ultra-Thin Oxide Partially-Depleted (PD) SOI Floating Body CMOS by Chen, D., Lee, R., Liu, Y.C., Guan Shyan Lin, Mao Chyuan Tang, Meng Fan Wang, Yeh, C.S., Chien, S.C.

“…For the first time, an efficient methodology to accurately characterize the gate-bulk leakage current (I gb ) and gate capacitance (C gg ) of PD SOI floating…”
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A new strategy of iontophoresis for hyperhidrosis by Shen, J L, Lin, G S, Li, W M

“…We used a modified iontophoretic method with an anticholinergic agent and aluminum chloride to treat hyperhidrosis. The strategy behind this combination was to…”
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Compact modeling solution of layout dependent effect for FinFET technology by Chen, David C., Lin, Guan Shyan, Lee, Tien Hua, Lee, Ryan, Liu, Y C, Wang, Meng Fan, Cheng, Yi Ching, Wu, D. Y.

“…We successfully developed and verified a complete compact model solution for layout dependent effect (LDE) of FinFET technology. LDE has significant impact on…”
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Improved Characterization Methodology of Gate-Bulk Leakage and Capacitance for Ultrathin Oxide Partially Depleted SOI Floating-Body CMOS : International Conference on Microelectronic Test Structures by CHEN, David C, LEE, Ryan, LIU, Yuan-Chang, LIN, Guan-Shyan, TANG, Mao-Chyuan, WANG, Meng-Fan, YEH, Chune-Sin, CHIEN, Shan-Chieh

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