Search Results - "Guan Lim, Teck"
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A SiGe BiCMOS Transmitter/Receiver Chipset With On-Chip SIW Antennas for Terahertz Applications
Published in IEEE journal of solid-state circuits (01-11-2012)“…This paper presents a terahertz (THz) transmitter (Tx) and receiver (Rx) chipset operating around 400 GHz in 0.13- μm SiGe BiCMOS technology. The Tx chip…”
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Journal Article Conference Proceeding -
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77-GHz FOWLP MIMO AiP for Compact High-Resolution Radar With Horizontally and Vertically Long- and Medium-Range Sensing
Published in IEEE transactions on components, packaging, and manufacturing technology (2011) (01-04-2024)“…77-GHz automotive multiple input multiple output (MIMO) radar is traditionally implemented in the bulky PCB board in a cascaded format to achieve a high…”
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Journal Article -
3
135-GHz Micromachined On-Chip Antenna and Antenna Array
Published in IEEE transactions on antennas and propagation (01-10-2012)“…This paper presents the design, fabrication and "on-wafer" characterization of multi-membrane-supported and polymer-cavity-backed monopole antenna and 2× 1…”
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Journal Article -
4
Compact High-Gain mmWave Antenna for TSV-Based System-in-Package Application
Published in IEEE transactions on components, packaging, and manufacturing technology (2011) (01-05-2012)“…This paper presents a cavity-backed slot (CBS) antenna for millimeter-wave applications. The cavity of the antenna is fully filled by polymer material. This…”
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Journal Article -
5
0.7-dB Insertion-Loss D-Band Lange Coupler Design and Characterization in 0.13 μm SiGe BiCMOS Technology
Published in Journal of infrared, millimeter and terahertz waves (01-10-2010)“…Design, measurement, and characterization of a low-loss Lange coupler on Si-substrate up to 170 GHz are presented in this paper. How to determine the value of…”
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Journal Article -
6
Compact Wideband Equivalent-Circuit Model for Electrical Modeling of Through-Silicon Via
Published in IEEE transactions on microwave theory and techniques (01-06-2011)“…This paper presents a compact wideband equivalent circuit model for electrical modeling of through-silicon vias (TSVs) in 3-D stacked integrated circuits and…”
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Ka-band CPW-to-slotline transition in photoimageable thick film technology for tapered slot antenna applications
Published in Microwave and optical technology letters (01-10-2006)“…A simple and compact coplanar waveguide to slotline transition operating from 22 to 34 GHz is presented. It is designed for feeding tapered slot antennas…”
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Journal Article -
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Embedded Wafer Level Packaging for 77-GHz Automotive Radar Front-End With Through Silicon Via and its 3-D Integration
Published in IEEE transactions on components, packaging, and manufacturing technology (2011) (01-09-2013)“…In this paper, a 77-GHz automotive radar sensor transceiver front-end module is packaged with a novel embedded wafer level packaging (EMWLP) technology. The…”
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Journal Article -
10
TSV Technology for Millimeter-Wave and Terahertz Design and Applications
Published in IEEE transactions on components, packaging, and manufacturing technology (2011) (01-02-2011)“…The through silicon via (TSV) technology provides a promising option to realize a compact millimeter-wave (mmW) and terahertz (THz) system with high…”
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Journal Article -
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273-GHz 2X Subharmonic Up-Conversion Mixer for System-on-Package Applications
Published in IEEE transactions on components, packaging, and manufacturing technology (2011) (01-12-2012)“…In this paper, a 273-GHz 2X subharmonic passive mixer is proposed for system-on-package applications. The mixer is designed and implemented using thin-film…”
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Journal Article -
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High Density TSV-Free Interposer (TFI) Packaging with Submicron Cu Damascene RDLs for Integration of CPU/GPU and HBM
Published in 2018 IEEE 68th Electronic Components and Technology Conference (ECTC) (01-05-2018)“…TSV-Free Interposer (TFI) packaging technology was developed for central/graphics processing unit (CPU/GPU) and stacked memory system-in-package (SiP)…”
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Conference Proceeding -
13
Millimeter-Wave Frequency Doubler With Transistor Grounded-Shielding Structure in }\mu} SiGe BiCMOS Technology
Published in IEEE transactions on microwave theory and techniques (01-05-2011)“…A low conversion-loss monolithic frequency doubler has been developed for D-band signal generation in 0.13-μm SiGe BiCMOS technology. The circuit uses a…”
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Journal Article -
14
Characterization of FOWLP Antenna in Packages
Published in 2023 IEEE 25th Electronics Packaging Technology Conference (EPTC) (05-12-2023)“…The Antenna in Package (AiP) based on Fan-Out Wafer-Level-Packaging (FOWLP) enables compact beam steering solutions for Satcom On the Move (SOTM) and 5G…”
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Conference Proceeding -
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Enhancement of Silicon-Based Inductor Q-Factor Using Polymer Cavity
Published in IEEE transactions on components, packaging, and manufacturing technology (2011) (01-12-2012)“…A simple low-cost post-complementary metal-oxide-semiconductor-compatible process to enhance the performance of the planar spiral inductor in standard silicon…”
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Journal Article -
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Development of Flip-Chip Packaging for Monolithic Microwave Integrated Circuit
Published in 2023 IEEE 25th Electronics Packaging Technology Conference (EPTC) (05-12-2023)“…In this paper, the flip chip joints formed by using gold (Au) stud on commercial-off-the shelf (COTS) monolithic microwave integrate circuit (MMIC) designed…”
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Conference Proceeding -
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Millimeter-Wave Antenna in Fan-Out Wafer Level Packaging for 60 GHz WLAN Application
Published in 2018 IEEE 68th Electronic Components and Technology Conference (ECTC) (01-05-2018)“…In this paper, a 3D integration package of antenna and chip is proposed. A patch antenna array is integrated with RF chip on fan-out wafer level packaging…”
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Conference Proceeding -
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Characterization of 224 Gbps/lambda Interconnects in Co-Packaged Optics for Hyperscale Data Centers and AI/ML Clusters
Published in 2024 IEEE 74th Electronic Components and Technology Conference (ECTC) (28-05-2024)“…In this work, interconnects between Optical Engine (OE) and switch in a Co-Packaged Optics (CPO) architecture are characterized. The OE is fabricated in…”
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Conference Proceeding -
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Parasitic Surface Conduction Effect of TSV on Interconnection Performance in RF SOI for 2.5D Integration
Published in 2023 IEEE 25th Electronics Packaging Technology Conference (EPTC) (05-12-2023)“…Silicon interposer is being widely used for 2.5D integration due to its advanced performance. However, the resistivity of the silicon can be impacted by the…”
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Conference Proceeding -
20
Characterization of Differential TMV Vertical Interconnects to 50GHz with Double Side Measurement
Published in 2023 IEEE 25th Electronics Packaging Technology Conference (EPTC) (05-12-2023)“…Fan-Out Wafer Level Packaging (FOWLP) can be a good candidate for heterogeneous integration of Photonic ICs (PIC) and Electronic ICs (EIC) in the same package…”
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Conference Proceeding