Search Results - "Grossnickle, Vaughn"

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    29.3 80ns Fast-Lock 0.4-to-6.5GHz Clock Generator with Self- Referenced Asynchronous Adaptive Droop Mitigation by Mosalikanti, Praveen, Wang, Qi, Shen, Kuan-Yueh James, Neidengard, Mark, Farooq, Syed Feruz Syed, Grossnickle, Vaughn, Kurd, Nasser

    “…We present a 0.4-to-6.5GHz Frequency Locked Loop (FLL) implemented in 10nm CMOS, targeting high performance SoCs that require uninterrupted, overshoot-free…”
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    Conference Proceeding
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