Search Results - "Govoreanu, B"

Te-based chalcogenide materials for selector applications by Velea, A., Opsomer, K., Devulder, W., Dumortier, J., Fan, J., Detavernier, C., Jurczak, M., Govoreanu, B.

“…The implementation of dense, one-selector one-resistor (1S1R), resistive switching memory arrays, can be achieved with an appropriate selector for correct…”
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Low dephasing and robust micromagnet designs for silicon spin qubits by Dumoulin Stuyck, N. I., Mohiyaddin, F. A., Li, R., Heyns, M., Govoreanu, B., Radu, I. P.

“…Using micromagnets to enable electron spin manipulation in silicon qubits has emerged as a very popular method, enabling single-qubit gate fidelities larger…”
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Evidences of oxygen-mediated resistive-switching mechanism in TiN\HfO2\Pt cells by Goux, L., Czarnecki, P., Chen, Y. Y., Pantisano, L., Wang, X. P., Degraeve, R., Govoreanu, B., Jurczak, M., Wouters, D. J., Altimime, L.

“…In this letter, we study the influence of the Pt top-electrode thickness and of the chamber atmosphere during cell operation on the resistive switching of…”
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Path toward manufacturable superconducting qubits with relaxation times exceeding 0.1 ms by Verjauw, J., Acharya, R., Van Damme, J., Ivanov, Ts, Lozano, D. Perez, Mohiyaddin, F. A., Wan, D., Jussot, J., Vadiraj, A. M., Mongillo, M., Heyns, M., Radu, I., Govoreanu, B., Potočnik, A.

“…As the superconducting qubit platform matures towards ever-larger scales in the race towards a practical quantum computer, limitations due to qubit…”
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Linking Room- and Low-Temperature Electrical Performance of MOS Gate Stacks for Cryogenic Applications by Kao, K.-H., Godfrin, C., Elsayed, A., Li, R., Simoen, E., Grill, A., Kubicek, S., Radu, I. P., Govoreanu, B.

“…Based on MOSFETs with four different gate stacks, we extract the oxide trap density and transconductance from the low frequency noise and DC transfer…”
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High- k dielectrics for future generation memory devices (Invited Paper) by Kittl, J.A., Opsomer, K., Popovici, M., Menou, N., Kaczer, B., Wang, X.P., Adelmann, C., Pawlak, M.A., Tomida, K., Rothschild, A., Govoreanu, B., Degraeve, R., Schaekers, M., Zahid, M., Delabie, A., Meersschaut, J., Polspoel, W., Clima, S., Pourtois, G., Knaepen, W., Detavernier, C., Afanas’ev, V.V., Blomberg, T., Pierreux, D., Swerts, J., Fischer, P., Maes, J.W., Manger, D., Vandervorst, W., Conard, T., Franquet, A., Favia, P., Bender, H., Brijs, B., Van Elshocht, S., Jurczak, M., Van Houdt, J., Wouters, D.J.

“…The requirements and development of high- k dielectric films for application in storage cells of future generation flash and Dynamic Random Access Memory…”
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Low charge noise quantum dots with industrial CMOS manufacturing by Elsayed, A., Shehata, M. M. K., Godfrin, C., Kubicek, S., Massar, S., Canvel, Y., Jussot, J., Simion, G., Mongillo, M., Wan, D., Govoreanu, B., Radu, I. P., Li, R., Van Dorpe, P., De Greve, K.

“…Silicon spin qubits are promising candidates for scalable quantum computers, due to their coherence and compatibility with CMOS technology. Advanced industrial…”
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Low-loss α-tantalum coplanar waveguide resonators on silicon wafers: fabrication, characterization and surface modification by Lozano, D P, Mongillo, M, Piao, X, Couet, S, Wan, D, Canvel, Y, Vadiraj, A M, Ivanov, Ts, Verjauw, J, Acharya, R, Van Damme, J, Mohiyaddin, F A, Jussot, J, Gowda, P P, Pacco, A, Raes, B, Van de Vondel, J, Radu, I P, Govoreanu, B, Swerts, J, Potočnik, A, De Greve, K

“…The performance of state-of-the-art superconducting quantum devices is currently limited by microwave dielectric loss at different interfaces. α -tantalum is a…”
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Statistical insight into controlled forming and forming free stacks for HfOx RRAM by Raghavan, N., Fantini, A., Degraeve, R., Roussel, P.J., Goux, L., Govoreanu, B., Wouters, D.J., Groeseneken, G., Jurczak, M.

“…•Percolation model used to optimize oxide and cap thickness for forming-free RRAM.•“Hot forming” helps reduce variability in the forming voltage…”
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High mobility SiMOSFETs fabricated in a full 300 mm CMOS process by Camenzind, T N, Elsayed, A, Mohiyaddin, F A, Li, R, Kubicek, S, Jussot, J, Van Dorpe, P, Govoreanu, B, Radu, I, Zumbühl, D M

“…The quality of the semiconductor–barrier interface plays a pivotal role in the demonstration of high quality reproducible quantum dots for quantum information…”
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Temperature Dependent Mismatch and Variability in a Cryo-CMOS Array with 30k Transistors by Grill, A., John, V., Michl, J., Beckers, A., Bury, E., Tyaginov, S., Parvais, B., Chasin, A. Vaisman, Grasser, T., Waltl, M., Kaczer, B., Govoreanu, B.

“…Integrating CMOS circuits and qubits at cryogenic temperatures is one of the key challenges to mitigate wiring constraints and ensure signal integrity to…”
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Comprehensive 300 mm process for Silicon spin qubits with modular integration by Elsayed, A., Godfrin, C., Dumoulin Stuyck, N.I., Shehata, M.M.K., Kubicek, S., Massar, S., Canvel, Y., Jussot, J., Hikavyy, A., Loo, R., Simion, G., Mongillo, M., Wan, D., Govoreanu, B., Li, R., Radu, I.P., Van Dorpe, P., De Greve, K.

“…We report a comprehensive 300 mm industrial silicon spin qubit integration process for large scale quantum processors. The process was designed to be modular…”
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On the Roll-Off of the Activation Energy Plot in High-Temperature Flash Memory Retention Tests and its Impact on the Reliability Assessment by Govoreanu, B., Van Houdt, J.

“…In this letter, we discuss the experimental behavior of high-kappa interpoly dielectrics in floating gate memory devices with respect to the activation energy…”
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Circuit Model for the Efficient Co-Simulation of Spin Qubits and their Control & Readout Circuitry by Gys, B., Mohiyaddin, F. A., Acharya, R., Li, R., De Greve, K., Gielen, G., Govoreanu, B., Radu, I. P., Catthoor, F.

“…In the past years, individual electron spins confined in quantum dots have emerged as a promising candidate for realizing qubits, in view of their good…”
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Scaling down the interpoly dielectric for next generation Flash memory: Challenges and opportunities by Govoreanu, B., Brunco, D.P., Van Houdt, J.

“…We review the main issues in scaling down the interpoly dielectric (IPD) for future floating gate Flash memory technology generations. The equivalent oxide…”
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Circuit Model for the Efficient Co-Simulation of Spin Qubits and their Control & Readout Circuitry by Gys, B., Mohiyaddin, F. A., Acharya, R., Li, R., De Greve, K., Gielen, G., Govoreanu, B., Radu, I. P., Catthoor, F.

“…In the past years, individual electron spins confined in quantum dots have emerged as a promising candidate for realizing qubits, in view of their good…”
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Determination of Ultimate Leakage Through Rutile TiO2 and Tetragonal ZrO2 From Ab Initio Complex Band Calculations by CLIMA, Sergiu, KACZER, B, GOVOREANU, B, POPOVICI, M, SWERTS, J, VERHULST, A. S, JURCZAK, M, DE GENDT, S, POURTOIS, G

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Electron Trap Profiling Near Al2O3/Gate Interface in TANOS Stack Using Gate-Side Trap Spectroscopy by Charge Injection and Sensing by ZAHID, M. B, ARREGHINI, A, DEGRAEVE, R, GOVOREANU, B, SUHANE, A, VAN HOUDT, J

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A-VMCO: A novel forming-free, self-rectifying, analog memory cell with low-current operation, nonfilamentary switching and excellent variability by Govoreanu, B., Crotti, D., Subhechha, S., Zhang, L., Chen, Y. Y., Clima, S., Paraschiv, V., Hody, H., Adelmann, C., Popovici, M., Richard, O., Jurczak, M.

“…We demonstrate a self-rectifying, compliance-free, BEOL CMOS-compatible, resistive switching memory device, with nonfilamentary switching mechanism,…”
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TCAD-Assisted MultiPhysics Modeling & Simulation for Accelerating Silicon Quantum Dot Qubit Design by Mohiyaddin, F. A., Simion, G., Stuyck, N. I. Dumoulin, Li, R., Elsayed, A., Shehata, M., Kubicek, S., Godfrin, C., Chan, B. T., Jussot, J., ubotaru, F. C, Brebels, S., Bufler, F. M., Eneman, G., Weckx, P., Matagne, P., Spessot, A., Govoreanu, B., Radu, I. P.

“…We summarize the design parameters and modeling techniques for silicon quantum dot qubit devices. A general overview on the operation of the devices -…”
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