Search Results - "Gouker, P. M."

Improvement of SOI MOSFET RF Performance by Implant Optimization by Chen, C L, Knecht, J M, Kedzierski, J, Chen, C K, Gouker, P M, Yost, D.-R, Healey, P, Wyatt, P W, Keast, C L

“…The characteristics of silicon on insulator MOSFETs are modified to enhance the RF performance by varying channel implants. Without adding new masks or…”
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Effects of Ionizing Radiation on Digital Single Event Transients in a 180-nm Fully Depleted SOI Process by Gouker, P.M., Gadlage, M.J., McMorrow, D., McMarr, P., Hughes, H., Wyatt, P., Keast, C., Bhuva, B.L., Narasimham, B.

“…Effects of ionizing radiation on single event transients are reported for Fully Depleted SOI (FDSOI) technology using experiments and simulations. Logic…”
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3D-enabled heterogeneous integrated circuits by Chen, C. K., Yost, D. R. W., Aull, B. F., Chen, C. L., Gouker, P. M., Knecht, J. M., Tyrrell, B. M., Warner, K., Wheeler, B., Wyatt, P. W., Keast, C. L., Suntharalingam, V.

“…Presents a collection of slides covering the following topics: bonding; 3D integrated circuit process flow; lithographic requirements; 3-tier single-photon…”
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Fabrication of self-aligned 90-nm fully depleted SOI CMOS SLOTFETs by Chen, C.K., Chen, C.L., Gouker, P.W., Wyatt, P.W., Yost, D.R., Burns, J.A., Suntharalingam, V., Fritze, M., Keast, L.

“…We have developed a novel sub-100-nm fully depleted silicon-on-insulator (SOI) CMOS fabrication process, in which conventional 248-nm optical lithography and…”
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Hardness Assurance Testing for Proton Direct Ionization Effects by Schwank, J. R., Shaneyfelt, M. R., Ferlet-Cavrois, V., Dodd, P. E., Blackmore, E. W., Pellish, J. A., Rodbell, K. P., Heidel, D. F., Marshall, P. W., LaBel, K. A., Gouker, P. M., Tam, N., Wong, R., Shi-Jie Wen, Reed, R. A., Dalton, S. M., Swanson, S. E.

“…The potential for using the degraded beam of high-energy proton radiation sources for proton hardness assurance testing for ICs that are sensitive to proton…”
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Radiation Effects in 3D Integrated SOI SRAM Circuits by Gouker, P. M., Tyrrell, B., D'Onofrio, R., Wyatt, P., Soares, T., Weilin Hu, Chenson Chen, Schwank, J. R., Shaneyfelt, M. R., Blackmore, E. W., Delikat, K., Nelson, M., McMarr, P., Hughes, H., Ahlbin, J. R., Weeden-Wright, S., Schrimpf, R.

“…Radiation effects are presented for the first time for vertically integrated 3 × 64-kb SOI SRAM circuits fabricated using the 3D process developed at MIT…”
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SET Characterization in Logic Circuits Fabricated in a 3DIC Technology by Gouker, P. M., Tyrrell, B., Renzi, M., Chenson Chen, Wyatt, P., Ahlbin, J. R., Weeden-Wright, S., Atkinson, N. M., Gaspard, N. J., Bhuva, B. L., Massengill, L. W., Enxia Zhang, Schrimpf, R., Weller, R. A., King, M. P., Gadlage, M. J.

“…Single event transients are characterized for the first time in logic gate circuits fabricated in a novel 3DIC technology where SET test circuits are…”
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Comparison of Single and Two-Photon Absorption for Laser Characterization of Single-Event Upsets in SOI SRAMs by Schwank, J. R., Shaneyfelt, M. R., Dodd, P. E., McMorrow, D., Warner, J. H., Ferlet-Cavrois, V., Gouker, P. M., Melinger, J. S., Pellish, J. A., Rodbell, K. P., Heidel, D. F., Marshall, P. W., LaBel, K. A., Swanson, S. E.

“…The laser pulse energy thresholds for single-event upset measured by single photon and two photon absorption are measured and compared for Sandia SRAMs and…”
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Direct Comparison of Charge Collection in SOI Devices From Single-Photon and Two-Photon Laser Testing Techniques by Schwank, J R, Shaneyfelt, M R, Dodd, P E, McMorrow, D, Vizkelethy, G, Ferlet-Cavrois, V, Gouker, P M, Flores, R S, Stevens, J, Buchner, S B, Dalton, S M, Swanson, S E

“…The amounts of charge collection by single-photon absorption (SPA) and by two-photon absorption (TPA) laser testing techniques have been directly compared…”
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Channel engineering of SOI MOSFETs for RF applications by Chen, C.L., Knecht, J.M., Kedzierski, J., Chen, C.K., Gouker, P.M., Yost, D.-R., Healey, P., Wyatt, P.W., Keast, C.L.

“…Channel engineering of SOI MOSFETs is explored by altering ion implantation without adding any new fabrication steps to the standard CMOS process. The effects…”
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Radiation effects in MIT Lincoln lab 3DIC technology by Gouker, P.M., Wyatt, P.W., Yost, D.-R., Chen, C.K., Knecht, J.M., Chen, C.L., Keast, C.L.

“…We characterized TID effects in MITLL 3DIC technology. We found that the effects were comparable for nFETs on the bottom tier with that on single tier wafers…”
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Fully Depleted SOI RF Switch with Dynamic Biasing by Chen, C.L., Chen, C.K., Wyatt, P.W., Knecht, J.M., Yost, D.-R., Gouker, P.M., Healey, P.D., Keast, C.L.

“…RF switches based on fully depleted (FD) SOI technology are reported for the first time. In a novel biasing circuit, the conventional bias resistor at the gate…”
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Enhanced resolution for future fabrication by Fritze, M., Keast, C.L., Chen, C.K., Astolfi, D.K., Yost, D.R., Burns, J.A., Chang-Lee Chen, Gouker, P.M., Suntharalingam, V., Wyatt, P.W.

“…We have developed resolution-enhanced optical lithography processes that have enabled us to fabricate devices with deep sub-100 nm feature sizes. Isolated gate…”
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Characterization of Single-Event Transients Of Body-Tied vs. floating-body circuits in 150 nm 3D SOI by Gaspard, N. J., Ahlbin, J. R., Gouker, P. M., Atkinson, N. M., Gadlage, M. J., Witulski, A. F., Holman, W. T., Bhuva, B. L., Zhang, E. X., Massengill, L. W.

“…Floating-body and body-tied inverter circuits were implemented in MIT Lincoln-Lab's 3-dimensional SOI 150 nm process to characterize the technology for…”
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Wafer-Scale 3D Integration of Silicon-on-Insulator RF Amplifiers by Chen, C.L., Chen, C.K., Yost, D.-R., Knecht, J.M., Wyatt, P.W., Burns, J.A., Warner, K., Gouker, P.M., Healey, P., Wheeler, B., Keast, C.L.

“…RF amplifiers are demonstrated using a three- dimensional (3D) wafer-scale integration technology based on silicon-on-insulator (SOI) CMOS process. This new 3D…”
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Hardness assurance testing for proton direct ionization effects by Schwank, J. R., Shaneyfelt, M. R., Ferlet-Cavrois, V., Dodd, P. E., Blackmore, E. W., Pellish, J. A., Rodbell, K. P., Heidel, D. F., Marshall, P. W., LaBel, K. A., Gouker, P. M., Tam, N., Wong, R., Wen, S., Reed, R. A., Dalton, S. M., Swanson, S. E.

“…The potential for using the degraded beam of high-energy proton radiation sources for proton hardness assurance testing for ICs that are sensitive to proton…”
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Effects of Through-BOX Vias on SOI MOSFETs by Chen, C.L., Chen, C.K., Wyatt, P.W., Gouker, P.M., Burns, J.A., Knecht, J.M., Yost, D.-R., Healey, P., Keast, C.L.

“…The metal-filled vias through the buried oxide are integrated with silicon-on-insulator (SOI) MOSFETs. The FET temperature, measured directly using integrated…”
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