Search Results - "Gorman, Kevin W."
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Optimizing delay tests at the memory boundary
Published in 2015 IEEE International Test Conference (ITC) (01-10-2015)“…Delay faults on the inputs and outputs of memories embedded in an integrated circuit are difficult to cover efficiently in manufacturing test. A complicated…”
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Conference Proceeding -
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Embedded DRAM in 45-nm Technology and Beyond
Published in IEEE design & test of computers (01-01-2011)“…As power and density requirements for embedded memories grow, products ranging from mobile applications to high-performance microprocessors are increasingly…”
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Journal Article -
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Practical Application of RAM Sequential Test
Published in IEEE design and test (01-12-2016)“…With the growing number and speed of embedded memories, testing for delay defects in the logic surrounding RAMs is becoming increasingly important. This…”
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Magazine Article -
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Low Cost Test of High Bandwidth Embedded Memories
Published in IEEE Custom Integrated Circuits Conference 2006 (01-09-2006)“…This work presents architectures and methods necessary for providing efficient and thorough test of high bandwidth embedded memories using low speed ATE…”
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Conference Proceeding