Search Results - "Gonugondla, Sujan K."

A Multi-Functional In-Memory Inference Processor Using a Standard 6T SRAM Array by Mingu Kang, Gonugondla, Sujan K., Patil, Ameya, Shanbhag, Naresh R.

“…A multi-functional in-memory inference processor integrated circuit (IC) in a 65-nm CMOS process is presented. The prototype employs a deep in-memory…”
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A Variation-Tolerant In-Memory Machine Learning Classifier via On-Chip Training by Gonugondla, Sujan K., Kang, Mingu, Shanbhag, Naresh R.

“…This paper presents a robust deep in-memory machine learning classifier with a stochastic gradient descent (SGD)-based on-chip trainer using a standard 16-kB…”
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Deep In-Memory Architectures in SRAM: An Analog Approach to Approximate Computing by Kang, Mingu, Gonugondla, Sujan K., Shanbhag, Naresh R.

“…This article provides an overview of recently proposed deep in-memory architectures (DIMAs) in SRAM for energy- and latency-efficient hardware realization of…”
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A 0.44-μJ/dec, 39.9-μs/dec, Recurrent Attention In-Memory Processor for Keyword Spotting by Dbouk, Hassan, Gonugondla, Sujan K., Sakr, Charbel, Shanbhag, Naresh R.

“…This article presents a deep learning-based classifier IC for keyword spotting (KWS) in 65-nm CMOS designed using an algorithm-hardware co-design approach…”
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Fundamental Limits on Energy-Delay-Accuracy of In-Memory Architectures in Inference Applications by Gonugondla, Sujan K., Sakr, Charbel, Dbouk, Hassan, Shanbhag, Naresh R.

“…This article obtains fundamental limits on the computational precision of in-memory computing architectures (IMCs). An IMC noise model and associated…”
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Block-LMS and RLS adaptive filters using in-memory architectures by Radhakrishnan, Chandrasekhar, Gonugondla, Sujan K.

“…Deep in-memory architecture (DIMA) provides considerable latency and throughput improvements over conventional digital architectures. DIMA reads multiple bits…”
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KeyRAM: A 0.34 uJ/decision 18 k decisions/s Recurrent Attention In-memory Processor for Keyword Spotting by Dbouk, Hassan, Gonugondla, Sujan K., Sakr, Charbel, Shanbhag, Naresh R.

“…This paper presents a 0.34 uJ/decision deep learning-based classifier for keyword spotting (KWS) in 65 nm CMOS with all weights stored on-chip. This work…”
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Adaptive Filtering in In-Memory-Based Architectures by Radhakrishnan, Chandrasekhar, Gonugondla, Sujan K.

“…Deep in memory architecture (DIMA) has been proposed as a means to improve energy efficiency and latency over conventional digital architectures. DIMA reads…”
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An energy-efficient memory-based high-throughput VLSI architecture for convolutional networks by Mingu Kang, Gonugondla, Sujan K., Min-Sun Keel, Shanbhag, Naresh R.

“…In this paper, an energy efficient, memory-intensive, and high throughput VLSI architecture is proposed for convolutional networks (C-Net) by employing compute…”
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Perfect error compensation via algorithmic error cancellation by Gonugondla, Sujan K., Shim, Byonghyo, Shanbhag, Naresh R.

“…This paper presents a novel statistical error compensation (SEC) technique - algorithmic error cancellation (AEC)-for designing robust and energy-efficient…”
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A 19.4-nJ/Decision, 364-K Decisions/s, In-Memory Random Forest Multi-Class Inference Accelerator by Mingu Kang, Gonugondla, Sujan K., Sungmin Lim, Shanbhag, Naresh R.

“…This paper presents an integrated circuit (IC) realization of a random forest (RF) machine learning classifier in a 65-nm CMOS. Algorithm, architecture, and…”
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Fundamental Limits on the Precision of In-memory Architectures by Gonugondla, Sujan K., Sakr, Charbel, Dbouk, Hassan, Shanbhag, Naresh R.

“…This paper obtains the fundamental limits on the computational precision of in-memory computing architectures (IMCs). Various compute SNR metrics for IMCs are…”
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SWIPE: Enhancing Robustness of ReRAM Crossbars for In-memory Computing by Gonugondla, Sujan K., Patil, Ameya D., Shanbhag, Naresh R.

“…Crossbar-based in-memory architectures have emerged as an attractive platform for energy-efficient realization of deep neural networks (DNNs). A key challenge…”
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PROMISE: An End-to-End Design of a Programmable Mixed-Signal Accelerator for Machine-Learning Algorithms by Srivastava, Prakalp, Kang, Mingu, Gonugondla, Sujan K., Lim, Sungmin, Choi, Jungwook, Adve, Vikram, Kim, Nam Sung, Shanbhag, Naresh

“…Analog/mixed-signal machine learning (ML) accelerators exploit the unique computing capability of analog/mixed-signal circuits and inherent error tolerance of…”
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GDOT: A graphene-based nanofunction for dot-product computation by Wang, Ning C., Gonugondla, Sujan K., Nahlus, Ihab, Shanbhag, Naresh R., Pop, Eric

“…Though much excitement surrounds two-dimensional (2D) beyond CMOS fabrics like graphene and MoS 2 , most efforts have focused on individual devices, with few…”
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Energy-Efficient Deep In-memory Architecture for NAND Flash Memories by Gonugondla, Sujan K., Mingu Kang, Yongjune Kim, Helm, Mark, Eilert, Sean, Shanbhag, Naresh

“…This paper proposes an energy-efficient deep in-memory architecture for NAND flash (DIMA-F) to perform machine learning and inference algorithms on NAND flash…”
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A 19.4 nJ/decision 364K decisions/s in-memory random forest classifier in 6T SRAM array by Mingu Kang, Gonugondla, Sujan K., Shanbhag, Naresh R.

“…This paper presents IC realization of a random forest (RF) machine learning classifier. Algorithm-architecture-circuit is co-optimized to minimize the…”
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