Analysis of the electrical breakdown in hydrogenated amorphous silicon thin-film transistors

Electrical breakdown induced by systematic electrostatic discharge (ESD) stress of thin-film transistors used as switches in active matrix addressed liquid crystal displays has been studied using electrical measurements, electrical simulations, electrothermal simulations, and postbreakdown observati...

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Bibliographic Details
Published in:IEEE transactions on electron devices Vol. 49; no. 6; pp. 1012 - 1018
Main Authors: Golo, N.T., Kuper, F.G., Mouthaan, T.J.
Format: Journal Article
Language:English
Published: New York IEEE 01-06-2002
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:Electrical breakdown induced by systematic electrostatic discharge (ESD) stress of thin-film transistors used as switches in active matrix addressed liquid crystal displays has been studied using electrical measurements, electrical simulations, electrothermal simulations, and postbreakdown observations. Breakdown due to very short pulses (up to 1 /spl mu/s) shows a clear dependence on the channel length. A hypothesis that electrical breakdown in the case of short channel TFTs is due to the punch-through is built on this dependence and is proved by means of electrical simulations. Further, the presence of avalanche breakdown in amorphous silicon thin-film transistors is simulated and confirmed. It is finally assumed that the breakdown is a thermal process. Three-dimensional (3-D) electrothermal simulations are performed in the static and transient regime, confirming the location of the breakdown spot within the TFT from the electrical simulations and postbreakdown observations.
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ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2002.1003722