Search Results - "Givargis, T."

Platune: a tuning framework for system-on-a-chip platforms by Givargis, T., Vahid, F.

“…System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase…”
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System-level exploration for Pareto-optimal configurations in parameterized system-on-a-chip by Givargis, T., Vahid, F., Henkel, J.

“…In this work, we provide a technique for efficiently exploring the power/performance design space of a parameterized system-on-chip (SOC) architecture to find…”
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Platform tuning for embedded systems design by Vahid, F., Givargis, T.

“…Parameterized SOC platforms solve numerous problems that face system designers. With platforms ranging from IP to IC variants and tuning tasks ranging from…”
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Differential GPS reference station algorithm-design and analysis by Farrell, J., Givargis, T.

“…The global positioning system (GPS) allows properly equipped users to determine their position based on the measured pseudoranges to at least four satellites…”
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Platform tuning for embedded systems design by Vahid, F., Givargis, T.

“…Parameterized system-on-chip platforms solve numerous problems that face today's system designers. With platforms ranging from IP to IC variants and tuning…”
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Expression equivalence checking using interval analysis by Ghodrat, M.A., Givargis, T., Nicolau, A.

“…Arithmetic expressions are the fundamental building blocks of hardware and software systems. An important problem in computational theory is to decide if two…”
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Instruction-based system-level power evaluation of system-on-a-chip peripheral cores by Givargis, T., Vahid, F., Henkel, J.

“…Various core-based power evaluation approaches for microprocessors, caches, memories and buses have been proposed in the past. We propose a new power…”
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Improved indexing for cache miss reduction in embedded systems by Givargis, Tony

“…The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache…”
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Real-time differential carrier phase GPS-aided INS by Farrell, J.A., Givargis, T.D., Barth, M.J.

“…This article describes the implementation and experimental results of a real-time carrier phase differential Global Positioning System (GPS) aided inertial…”
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Dynamic voltage and cache reconfiguration for low power by Nacul, A.C., Givargis, T.

“…This article deals about dynamic voltage and cache reconfiguration online algorithm that dynamically adapts the processor speed and the cache subsystem to the…”
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LORD: A Localized, Reactive and Distributed Protocol for Node Scheduling in Wireless Sensor Networks by Ghosh, Arijit, Givargis, Tony

“…The lifetime of wireless sensor networks can be increased by minimizing the number of active nodes that provide complete coverage, while switching off the…”
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Lightweight Multitasking Support for Embedded Systems using the Phantom Serializing Compiler by Nacul, Andre C., Givargis, Tony

“…Embedded software continues to play an ever increasing role in the design of complex embedded applications. In part, the elevated level of abstraction provided…”
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Beep: 3D indoor positioning using audible sound by Mandal, A., Lopes, C.V., Givargis, T., Haghighat, A., Jurdak, R., Baldi, P.

“…Rapid growth in the number of wireless enabled devices has led to an increased interest in location-aware applications. The backbone of such applications is…”
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Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs by Givargis, T.D., Vahid, F., Henkel, J.

“…Architectures with parameterizable cache and bus can support large tradeoffs between performance and power. We provide simulation data showing the large…”
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System-level exploration for Pareto-optimal configurations in parameterized systems-on-a-chip by Givargis, T., Vahid, F., Henkel, J.

“…Provides a technique for efficiently exploring the configuration space of a parameterized system-on-a-chip (SOC) architecture to find all Pareto-optimal…”
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Multi-objective design space exploration using genetic algorithms by Palesi, Maurizio, Givargis, Tony

“…In this work, we provide a technique for efficiently exploring a parameterized system-on-a-chip (SoC) architecture to find all Pareto-optimal configurations in…”
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A Custom FPGA Processor for Physical Model Ordinary Differential Equation Solving by Chen Huang, Vahid, F., Givargis, T.

“…Models of physical systems, such as of human physiology or of chemical reactions, are typically comprised of numerous ordinary differential equations (ODEs)…”
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Code partitioning for synthesis of embedded applications with phantom by Nacul, A. C., Givargis, T.

“…In a large class of embedded systems, dynamic multitasking using traditional OS techniques is infeasible because of memory and processing overheads or lack of…”
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Interface exploration for reduced power in core-based systems by Givargis, T., Vahid, F.

“…Reducing power dissipation is becoming more important in the design of embedded systems. Core-based system design opens up the opportunity for exploring…”
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Exploring efficient operating points for voltage scaled embedded processor cores by Buss, M., Givargis, T., Dutt, N.

“…Portable and battery operated devices pose a unique design challenge in terms of performance requirements, low-power constraints, and short design cycles…”
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