Search Results - "Gibert, Enric"
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1
Merging Ligand-Based and Structure-Based Methods in Drug Discovery: An Overview of Combined Virtual Screening Approaches
Published in Molecules (Basel, Switzerland) (15-10-2020)“…Virtual screening (VS) is an outstanding cornerstone in the drug discovery pipeline. A variety of computational approaches, which are generally classified as…”
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2
Assessing the Performance of Mixed Strategies To Combine Lipophilic Molecular Similarity and Docking in Virtual Screening
Published in Journal of chemical information and modeling (28-09-2020)“…The accuracy of structure-based (SB) virtual screening (VS) is heavily affected by the scoring function used to rank a library of screened compounds. Even in…”
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3
Development and Validation of Molecular Overlays Derived from Three-Dimensional Hydrophobic Similarity with PharmScreen
Published in Journal of chemical information and modeling (27-08-2018)“…Molecular alignment is a standard procedure for three-dimensional (3D) similarity measurements and pharmacophore elucidation. This process is influenced by…”
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4
Distributed data cache designs for clustered VLIW processors
Published in IEEE transactions on computers (01-10-2005)“…Wire delays are a major concern for current and forthcoming processors. One approach to deal with this problem is to divide the processor into semi-independent…”
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Journal Article Publication -
5
Development and validation of hydrophobic molecular fields derived from the quantum mechanical IEF/PCM-MST solvation models in 3D-QSAR
Published in Journal of computational chemistry (15-05-2016)“…Since the development of structure–activity relationships about 50 years ago, 3D‐QSAR methods belong to the most refined ligand‐based in silico techniques for…”
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6
Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading
Published in 2009 18th International Conference on Parallel Architectures and Compilation Techniques (01-01-2009)“…Industry is moving towards multi-core designs as we have hit the memory and power walls. Multi-core designs are very effective to exploit thread-level…”
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Conference Proceeding Publication -
7
Application of the quantum mechanical IEF/PCM-MST hydrophobic descriptors to selectivity in ligand binding
Published in Journal of molecular modeling (01-06-2016)“…We have recently reported the development and validation of quantum mechanical (QM)-based hydrophobic descriptors derived from the parametrized IEF/PCM-MST…”
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HW/SW co-designed processors: Challenges, design choices and a simulation infrastructure for evaluation
Published in 2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) (01-04-2017)“…Improving single thread performance is a key challenge in modern microprocessors especially because the traditional approach of increasing clock frequency and…”
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Conference Proceeding -
9
Profiling Support for Runtime Managed Code: Next Generation Performance Monitoring Units
Published in IEEE computer architecture letters (01-01-2015)“…Given the increase of runtime managed code environments in desktop, server, and mobile segments, agile, flexible, and accurate performance monitoring…”
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10
Quantitative characterization of the software layer of a HW/SW co-designed processor
Published in 2016 IEEE International Symposium on Workload Characterization (IISWC) (01-09-2016)“…HW/SW co-designed processors currently have a renewed interest due to their capability to boost performance without running into the power and complexity…”
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11
Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor
Published in 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings (2002)“…Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the…”
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Conference Proceeding Publication -
12
Variable-based multi-module data caches for clustered VLIW processors
Published in 14th International Conference on Parallel Architectures and Compilation Techniques (PACT'05) (2005)“…Memory structures consume an important fraction of the total processor energy. One solution to reduce the energy consumed by cache memories consists of…”
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13
Instruction scheduling for a clustered VLIW processor with a word-interleaved cache
Published in Concurrency and computation (01-09-2006)“…Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully distributed architectures, where the…”
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14
Local scheduling techniques for memory coherence in a clustered VLIW processor with a distributed data cache
Published in Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization (23-03-2003)“…Clustering is a common technique to deal with wire delays. Fully-distributed architectures, where the register file, the functional units and the cache memory…”
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Conference Proceeding -
15
Local scheduling techniques for memory coherence in a clustered VLIW processor with a distributed data cache
Published in ACM International Conference Proceeding Series; Vol. 37: Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization; 23-26 Mar. 2003 (01-01-2003)“…Clustering is a common technique to deal with wire delays. Fully-distributed architectures, where the register file, the functional units and the cache memory…”
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Conference Proceeding -
16
Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor
Published in Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture (18-11-2002)“…Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the…”
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Conference Proceeding -
17
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors
Published in International Symposium on Microarchitecture: Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture; 03-05 Dec. 2003 (03-12-2003)“…Wire delays are a major concern for current and forthcoming processors.One approach to attack this problem is to divide the processorinto semi-independent…”
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Conference Proceeding -
18
Flexible compiler-managed L0 buffers for clustered VLIW processors
Published in Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36 (2003)“…Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent…”
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Conference Proceeding Publication -
19
Local scheduling techniques for memory coherence in a clustered VLIW processor with a distributed data cache
Published in International Symposium on Code Generation and Optimization, 2003. CGO 2003 (2003)“…Clustering is a common technique to deal with wire delays. Fully-distributed architectures, where the register file, the functional units and the cache memory…”
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Conference Proceeding Publication