Si/InP Heterogeneous Integration Techniques from the Wafer-Scale (Hybrid Wafer Bonding) to the Discrete Transistor (Micro-Transfer Printing)
Compound semiconductor heterogeneous integration with silicon electronics offers new design opportunities for high performance microsystems. The indium phosphide (InP) material system is an attractive candidate for heterogeneous integration of both electronic and optoelectronic devices. For RF and m...
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Published in: | 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) pp. 1 - 4 |
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Main Authors: | , , , , , , , , , , , , |
Format: | Conference Proceeding |
Language: | English |
Published: |
IEEE
01-10-2018
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Subjects: | |
Online Access: | Get full text |
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Summary: | Compound semiconductor heterogeneous integration with silicon electronics offers new design opportunities for high performance microsystems. The indium phosphide (InP) material system is an attractive candidate for heterogeneous integration of both electronic and optoelectronic devices. For RF and mixed-signal integrated circuit (IC) applications, InP transistors offer the highest reported RF figures-of-merit, low transistor noise figure and high RF power density. We report on InP heterogeneous integration techniques performed at the wafer-scale using hybrid bonding and at the individual transistor level using micro-transfer printing. Both integration techniques maintain the native substrate transistor performance and have been used to demonstrate high performance millimeter-wave ICs (RF beamformers and power amplifiers). |
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DOI: | 10.1109/S3S.2018.8640196 |