Search Results - "Fey, Dietmar"
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Comparison of common parallel architectures for the execution of the island model and the global parallelization of evolutionary algorithms
Published in Concurrency and computation (10-05-2017)“…Summary Evolutionary algorithms are one of the most popular forms of optimization algorithms. They are comparatively easy to use and were successfully employed…”
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A flexible and fast digital twin for RRAM systems applied for training resilient neural networks
Published in Scientific reports (10-10-2024)“…Resistive Random Access Memory (RRAM) has gained considerable momentum due to its non-volatility and energy efficiency. Material and device scientists have…”
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RISC-V3: A RISC-V Compatible CPU With a Data Path Based on Redundant Number Systems
Published in IEEE access (2021)“…Redundant number systems (RNS) are a well-known technique to speed up arithmetic circuits. However, in a complete CPU, arithmetic circuits using RNS were only…”
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TReMo+: Modeling Ternary and Binary ReRAM-Based Memories With Flexible Write-Verification Mechanisms
Published in Frontiers in nanotechnology (08-12-2021)“…Non-volatile memory (NVM) technologies offer a number of advantages over conventional memory technologies such as SRAM and DRAM. These include a smaller area…”
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Disjoint Sum of Products by Orthogonalizing Difference-Building ⴱ
Published in Open Engineering (Warsaw) (03-07-2020)“…The orthogonalization of Boolean functions in disjunctive form, that means a Boolean function formed by sum of products, is a classical problem in the Boolean…”
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Case study on memristor‐based multilevel memories
Published in International journal of circuit theory and applications (01-01-2018)“…Summary In this work, the benefits of memristor‐based multilevel memories are described along with their design problems. Starting with measurements of…”
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A Framework for Ultra Low-Power Hardware Accelerators Using NNs for Embedded Time Series Classification
Published in Journal of low power electronics and applications (01-03-2022)“…In embedded applications that use neural networks (NNs) for classification tasks, it is important to not only minimize the power consumption of the NN…”
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Memristoren für zukünftige Rechnersysteme
Published in Informatik-Spektrum (2020)“…Zusammenfassung Als Memristor bezeichnet man eine Klasse von elektronischen Zweitor-Bauelementen, deren Strom-/Spannungsverlauf eine zumeist durch den…”
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Adaptation Strategies for Personalized Gait Neuroprosthetics
Published in Frontiers in neurorobotics (16-12-2021)“…Personalization of gait neuroprosthetics is paramount to ensure their efficacy for users, who experience severe limitations in mobility without an assistive…”
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FREACSIM - A Framework for Creating and Simulating Real-Time Capable Network on Chip Systems and Applications
Published in EAI endorsed transactions on internet of things (01-12-2016)“…This paper presents the new Framework for Real-time capable Embedded system and ArChitecture SIMulation (FREACSIM), a highly configurable full-system…”
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Hardware-software co-simulation for medical X-ray control units
Published in EAI endorsed transactions on industrial networks and intelligent systems (01-11-2016)“…In this paper we present our solution to master the complex- ity of product adaption cycles of a medical X-ray control unit. We present the real hardware and…”
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ExTern: Boosting RISC-V core performance using ternary encoding
Published in Microprocessors and microsystems (01-06-2024)“…This paper presents an effective μ-architectural design method, called ExTern, to enhance the performance of a RISC-V processor experiencing computation…”
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A Modeling Methodology for Resistive RAM Based on Stanford-PKU Model With Extended Multilevel Capability
Published in IEEE transactions on nanotechnology (2019)“…Modeling of resistive RAMs (RRAMs) is a herculean task due to its non-linearity. While the exigent need for a model has motivated research groups to formulate…”
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Incorporating Variability of Resistive RAM in Circuit Simulations Using the Stanford-PKU Model
Published in IEEE transactions on nanotechnology (2020)“…Intrinsic variability observed in resistive-switching devices (cycle-to-cycle and device-to-device) is widely recognised as a major hurdle for widespread…”
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Memristors divide to conquer device variability
Published in Nature electronics (01-08-2018)“…A memory cell design based on two memristors and one minimum-sized transistor can nullify parasitic currents, device-to-device variations and cycle-to-cycle…”
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HyFAR: A hypervisor-based fault tolerance approach for heterogeneous automotive real-time systems
Published in Journal of systems architecture (01-11-2024)“…Fault tolerance is a key aspect for fully autonomous vehicles, as there is no human driver available to take control of the vehicle as a backup. Such…”
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An extended analysis of memory hierarchies for efficient implementations of image processing applications
Published in Journal of real-time image processing (01-03-2018)“…Through continued miniaturization of electronic devices embedded smart cameras are steadily becoming more and more important. The reduction of the camera size…”
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Special issue on heterogeneous real-time image processing
Published in Journal of real-time image processing (01-03-2018)“…Another trend is to use new 3D integrated circuit technologies that allow for tighter integration of processor cores, memory, and sensors to reduce…”
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Reducing Hibernation Energy and Degradation in Bipolar ReRAM-Based Non-Volatile Processors
Published in IEEE transactions on nanotechnology (2019)“…ReRAM-based Non-Volatile Flip-Flops (NVFFs) enable instant hibernation and zero-leakage sleep modes that are highly desired in energy harvesting and…”
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Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures
Published in IEEE computer architecture letters (01-01-2023)“…The slow-down of technology scaling combined with the exponential growth of modern machine learning and artificial intelligence models has created a demand for…”
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