Search Results - "Ferain, I"

Junctionless Nanowire Transistor (JNT): Properties and design guidelines by Colinge, J.P., Kranti, A., Yan, R., Lee, C.W., Ferain, I., Yu, R., Dehdashti Akhavan, N., Razavi, P.

“…Junctionless transistors are variable resistors controlled by a gate electrode. The silicon channel is a heavily doped nanowire that can be fully depleted to…”
Get full text

Transport spectroscopy of a single dopant in a gated silicon nanowire by Sellier, H, Lansbergen, G P, Caro, J, Rogge, S, Collaert, N, Ferain, I, Jurczak, M, Biesemans, S

“…We report on spectroscopy of a single dopant atom in silicon by resonant tunneling between source and drain of a gated nanowire etched from silicon on…”
Get full text

Junctionless nanowire transistor (JNT): Properties and design guidelines by Kranti, A, Yan, R, Lee, C.-W, Ferain, I, Yu, R, Akhavan, N Dehdashti, Razavi, P, Colinge, J P

“…Conduction mechanisms in junctionless nanowire transistors (gated resistors) are compared to inversion-mode and accumulation-mode MOS devices. The junctionless…”
Get full text

Random telegraph-signal noise in junctionless transistors by Nazarov, A. N., Ferain, I., Akhavan, N. Dehdashti, Razavi, P., Yu, R., Colinge, J. P.

“…Random telegraph-signal noise (RTN) is measured in junctionless metal-oxide-silicon field-effect transistors (JL MOSFETs) as a function of gate and drain…”
Get full text

Impact ionization induced dynamic floating body effect in junctionless transistors by Yu, R., Nazarov, A.N., Lysenko, V.S., Das, S., Ferain, I., Razavi, P., Shayesteh, M., Kranti, A., Duffy, R., Colinge, J.-P.

“…► Steep SS in JL devices are observed. ► A positive loop turns on the device at lower Vt. ► The impact ionization in short channel JL devices is more…”
Get full text

Subthreshold channels at the edges of nanoscale triple-gate silicon transistors by Sellier, H., Lansbergen, G. P., Caro, J., Rogge, S., Collaert, N., Ferain, I., Jurczak, M., Biesemans, S.

“…The authors investigate the subthreshold behavior of triple-gate silicon field-effect transistors by low-temperature transport experiments. These…”
Get full text

Field-effect mobility extraction in nanowire field-effect transistors by combination of transfer characteristics and random telegraph noise measurements by Nazarov, A. N., Ferain, I., Dehdashti Akhavan, N., Razavi, P., Yu, R., Colinge, J. P.

“…A technique based on the combined measurements of random telegraph-signal noise amplitude and drain current vs. gate voltage characteristics is proposed to…”
Get full text

Dominant Layer for Stress-Induced Positive Charges in Hf-Based Gate Stacks by Zhang, J.F., Mo Huai Chang, Zhigang Ji, Lin Lin, Ferain, I., Groeseneken, G., Pantisano, L., De Gendt, S., Heyns, M.M.

“…Positive charges in Hf-based gate stacks play an important role in the negative bias temperature instability of pMOSFETs, and their suppression is a pressing…”
Get full text

Mobility and Dielectric Quality of 1-nm EOT HfSiON on Si(110) and (100) by Trojman, L., Pantisano, L., Ferain, I., Severi, S., Maes, H.E., Groeseneken, G.

“…In this paper, we study the mobility and dielectric quality of MOSFETs with 1-nm Equivalent Oxide Thickness (EOT) grown on substrates with different…”
Get full text

Multi-gate devices for the 32 nm technology node and beyond by COLLAERT, N, DE KEERSGIETER, A, SCHULZ, T, SAN, K. T, SON, N. J, VAN DAL, M. J. H, VERHEYEN, P, VON ARNIM, K, WITTERS, L, DE MEYER, K, BIESEMANS, S, JURCZAK, M, DIXIT, A, FERAIN, I, LAI, L.-S, LENOBLE, D, MERCHA, A, NACKAERTS, A, PAWLAK, B. J, ROOYACKERS, R

Get full text

Velocity and Mobility Investigation in 1-nm-EOT HfSiON on Si (110) and (100)-Does the Dielectric Quality Matter? by Trojman, L., Pantisano, L., Dehan, M., Ferain, I., Severi, S., Maes, H.E., Groeseneken, G.

“…One of the fundamental questions for gate-stack scaling is whether the low-field mobility measured in long-channel devices is a good proxy for short-channel…”
Get full text

On the impact of TiN film thickness variations on the effective work function of poly-Si/TiN/SiO2 and poly-Si/TiN/HfSiON gate stacks by SINGANAMALLA, R, YU, H. Y, POURTOIS, G, FERAIN, I, ANIL, K. G, KUBICEK, S, HOFFMANN, T. Y, JURCZAK, M, BIESEMANS, S, DE MEYER, K

Get full text

Reduction of the anomalous VT behavior in MOSFETs with high- κ/metal gate stacks by Ferain, I., Pantisano, L., Kottantharayil, A., Petry, J., Trojman, L., Collaert, N., Jurczak, M., De Meyer, K.

“…This study investigates the impact of different nitridation processes on hafnium silicon oxynitride (HfSiON) dielectrics. It is demonstrated that the threshold…”
Get full text

Performance improvement in narrow MuGFETs by gate work function and source/drain implant engineering by Ferain, I., Duffy, R., Collaert, N., van Dal, M.J.H., Pawlak, B.J., O’Sullivan, B., Witters, L., Rooyackers, R., Conard, T., Popovici, M., van Elshocht, S., Kaiser, M., Weemaes, R.G.R., Swerts, J., Jurczak, M., Lander, R.J.P., De Meyer, K.

“…At short gate lengths, narrow multiple-gate FETs (MuGFETs) are known to offer superior short channel effect (SCE) control than their bulk Si counterpart [Doyle…”
Get full text

Analog operation of junctionless transistors at cryogenic temperatures by Doria, R T, Pavanello, M A, Trevisoli, R D, de Souza, M, Lee, C W, Ferain, I, Dehdashti Akhavan, N, Yan, R, Razavi, P, Yu, R, Kranti, A, Colinge, J P

“…This work presented the analog behavior of nMOS Junctionless transistors in the temperature range of 100 K to 473 K investigated by experimental results and…”
Get full text

Mobility extraction using RFCV for 80nm MOSFET with 1nm EOT HfSiON/TiN by San Andrés, E., Pantisano, L., Severi, S., Trojman, L., Ferain, I., Toledano-Luque, M., Jurczak, M., Groeseneken, G., De Gendt, S., Heyns, M.

“…In this paper we show an experimental procedure to measure channel carrier mobility in technologically relevant MOSFET devices, featuring metal gate on high-k…”
Get full text

Charge pumping spectroscopy: HfSiON defect study after substrate hot electron injection by Toledano-Luque, M., Pantisano, L., Degraeve, R., Zahid, M.B., Ferain, I., San Andrés, E., Groeseneken, G., De Gendt, S.

“…Spectroscopic charge pumping (CP) is used to study the evolution of the energy distribution of trapped electrons within HfSiON/SiO 2 gate stacks under…”
Get full text

Performance assessment of (1 1 0) p-FET high- κ/MG: is it mobility or series resistance limited? by Trojman, L., Pantisano, L., Severi, S., San Andres, E., Hoffman, T., Ferain, I., De Gendt, S., Heyns, M., Maes, H., Groeseneken, G.

“…In this article the impact of Si-substrate orientation on mobility performance is studied for p-MOSFET’s with both HfSiON and SiON based dielectrics…”
Get full text

On the impact of TiN film thickness variations on the effective work function of poly-Si/TiN/SiO/sub 2/ and poly-Si/TiN/HfSiON gate stacks by Singanamalla, R., Yu, H.Y., Pourtois, G., Ferain, I., Anil, K.G., Kubicek, S., Hoffmann, T.Y., Jurczak, M., Biesemans, S., De Meyer, K.

“…The impact of TiN film thickness variations on the effective work function (WF) of poly-Si/TiN/SiO/sub 2/ and poly-Si/TiN/HfSiON interfaces has been…”
Get full text

Flexible and robust capping-metal gate integration technology enabling multiple-VT CMOS in MuGFETs by Veloso, A., Witters, L., Demand, M., Ferain, I., Son, N.J., Kaczer, B., Roussel, P.J., Simoen, E., Kauerauf, T., Adelmann, C., Brus, S., Richard, O., Bender, H., Conard, T., Vos, R., Rooyackers, R., Van Elshocht, S., Collaert, N., De Meyer, K., Biesemans, S., Jurczak, M.

“…We report, for the first time, a comprehensive study on various capping integration options for WF engineering in MuGFET devices with TiN gate electrode:…”
Get full text