Shape optimization of superconducting transmon qubit for low surface dielectric loss
Surface dielectric loss of superconducting transmon qubit is believed as one of the dominant sources of decoherence. Reducing surface dielectric loss of superconducting qubit is known to be a great challenge for achieving high quality factor and a long relaxation time ($T_{1}$). Changing the geometr...
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| Main Authors: | , , , , |
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| Format: | Journal Article |
| Language: | English |
| Published: |
25-11-2022
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| Subjects: | |
| Online Access: | Get full text |
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| Summary: | Surface dielectric loss of superconducting transmon qubit is believed as one
of the dominant sources of decoherence. Reducing surface dielectric loss of
superconducting qubit is known to be a great challenge for achieving high
quality factor and a long relaxation time ($T_{1}$). Changing the geometry of
capacitor pads and junction wire of transmon qubit makes it possible to
engineer the surface dielectric loss. In this paper, we present the shape
optimization approach for reducing Surface dielectric loss in transmon qubit.
The capacitor pad and junction wire of the transmon qubit are shaped as spline
curves and optimized through the combination of the finite-element method and
global optimization algorithm. Then, we compared the surface participation
ratio, which represents the portion of electric energy stored in each
dielectric layer and proportional to two-level system (TLS) loss, of optimized
structure and existing geometries to show the effectiveness of our approach.
The result suggests that the participation ratio of capacitor pad, and junction
wire can be reduced by 16% and 26% compared to previous designs through shape
optimization, while overall footprint and anharmonicity maintain acceptable
value. As a result, the TLS-limited quality factor and corresponding $T_{1}$
were increased by approximately 21.6%. |
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| DOI: | 10.48550/arxiv.2211.14159 |