Search Results - "Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)"
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1
Separation of random telegraph signals from 1/f noise in MOSFETs under constant and switched bias conditions
Published in ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003 (2003)“…The low-frequency noise power spectrum of small dimension MOSFETs is dominated by Lorentzians arising from random telegraph signals (RTS). The low-frequency…”
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2
Deep trench isolation for 600 V SOI power devices
Published in ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003 (2003)“…This paper describes the realization and characterisation of DTI (deep trench isolation) on thick (60 /spl mu/m) SOI (silicon on insulator) wafers for domestic…”
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3
Impact of charging on breakdown in deep trench isolation structures [parasitic MOSFET example]
Published in ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003 (2003)“…In this paper, the breakdown of a deep trench isolation structure has been analysed and modeled. In particular, it is shown that the breakdown voltage of the…”
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4
Gate isolation technology for compact poly-CMP embedded flash memories
Published in ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003 (2003)“…Downscaling the cell size of embedded flash memories is hampered by a minimum thickness of the tunnel oxide due to reliability constraints. The longer…”
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5
Enforcing passivity for rational function based macromodels of tabulated data
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…With the continually increasing operating frequencies, complex high-speed package and interconnect modules require characterization based on measured/simulated…”
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6
Enforcing bounded realness of S parameter through trace parameterization
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…A new method of enforcing the bounded realness of S parameter macro-model is proposed in this paper. With a given stable rational function obtained from…”
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Hybrid method for frequency-dependent lossy coupled transmission line characterization and modeling
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…This paper presents a hybrid method that combines measurements, electromagnetic (EM) numerical tools, and extrapolation techniques for accurate modeling of…”
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8
Delay extraction and passive macromodeling of lossy coupled transmission lines
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…Recently, several algorithms were proposed for time-domain macromodeling of distributed transmission line networks. It has been demonstrated that preserving…”
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9
CPU power supply impedance profile measurement using FFT and clock gating
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…CPU bypass mode clock gating and oscilloscope FFT features enable accurate measurement of a CPU's power delivery network impedance profile. The method…”
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10
Significant reduction of power/ground inductive impedance and simultaneous switching noise by using embedded film capacitor
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…Significant reduction of power/ground inductive impedance and SSN suppression was successfully demonstrated by using embedded capacitor film in high…”
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11
Impact of FR4 dielectric non-uniformity on the performance of multi-Gb/s differential signals
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…Phase skew in high speed differential signals caused by local spatial variation in dielectric constant is presented. A simple mathematical model that allows…”
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12
The development of a macro-modeling tool to develop IBIS models
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…A tool to convert SPICE netlists to IBIS (Input/Output Buffer Information Specification) models is presented. This tool simulates the netlist on a…”
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13
Frequency-dependent characterization of bulk and ceramic bypass capacitors
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…Power distribution networks (PDN) use various kinds of capacitors to create the required impedance profile and to suppress noise. The simple model of bypass…”
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14
Prediction and verification of power/ground plane edge radiation excited by through-hole signal via based on balanced TLM and via coupling model
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…We introduce a modeling and simulation method to predict power/ground plane resonance and edge radiation coupled from the broken return current path of a…”
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15
Experimental validation of crosstalk simulations for on-chip interconnects at high frequencies using S-parameters
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…Since advanced microprocessors are designed based on simulation tools, accurate assessments of the amount of crosstalk noise are of paramount importance to…”
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16
Including dispersive dielectrics in PEEC models
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…The PEEC method and solvers are continuously evolving as more new features are added to the approach. Finite dielectrics were added to solve a new class of…”
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17
The necessity and consequences of modeling driver and load nonlinearity in on-chip global interconnect noise verification
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…The verification of noise in on-chip global interconnect is performed through simulation of an electrical circuit comprised of a network of coupled…”
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18
Mixed signal validation of the Intel/spl reg/ Pentium/spl reg/ 4 microprocessor power-up sequence
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…The design of a robust microprocessor requires extensive logic validation. Millions of test vectors are applied and the output of every logic node is checked…”
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19
Extraction of /spl epsiv/(f) and tan /spl delta/(f) for BT insulator up to 30 GHz using the short-pulse propagation technique
Published in Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) (2003)“…The self-consistent frequency-dependent dielectric constant, /spl epsiv//sub r/(f), and dielectric loss, tan/spl delta/(f), are determined over the range 2 to…”
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20
Design and implementation of a 5GHz RF receiver front-end in LCP based system-on-package module with embedded chip technology
Published in ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING (2003)“…In this paper, we present a receiver front-end for 5GHz wireless LAN in novel LCP (liquid crystal polymer) based system-on-package module. The module is based…”
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