Search Results - "Dropsho, Steven"
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1
Dynamically tuning processor resources with adaptive processing
Published in Computer (Long Beach, Calif.) (01-12-2003)“…By using adaptive processing to dynamically tune major microprocessor resources, developers can achieve greater energy efficiency with reasonable hardware and…”
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Journal Article -
2
Dynamic frequency and voltage scaling for a multiple-clock-domain microprocessor
Published in IEEE MICRO (01-11-2003)“…Multiple clock domains is one solution to the increasing problem of propagating the clock signal across increasingly larger and faster chips. The ability to…”
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Journal Article -
3
Miss Rate Prediction Across Program Inputs and Cache Configurations
Published in IEEE transactions on computers (01-03-2007)“…Improving cache performance requires understanding cache behavior. However, measuring cache performance for one or two data input sets provides little insight…”
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Journal Article -
4
Miss Rate Prediction across All Program Inputs
Published in PACT: Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques; 27 Sept.-01 Oct. 2003 (27-09-2003)“…Improving cache performance requires understanding cache behavior. However, measuring cache performance for one or two data input sets provides little insight…”
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Conference Proceeding
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5
A phase adaptive cache hierarchy for SMT processors
Published in Microprocessors and microsystems (01-11-2011)“…Resizable caches can trade-off capacity for access speed to dynamically match the needs of the workload. In single-threaded cores, resizable caches have…”
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Journal Article -
6
Dynamic frequency and voltage control for a multiple clock domain microarchitecture
Published in 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings (2002)“…We describe the design, analysis, and performance of an on-line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD)…”
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Conference Proceeding -
7
Managing static leakage energy in microprocessor functional units
Published in 35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002. (MICRO-35). Proceedings (2002)“…Static energy due to subthreshold leakage current is projected to become a major component of the total energy in high performance microprocessors. Many…”
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Conference Proceeding -
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Enhancing branch prediction via on-line statistical analysis
“…To attain peak efficiency, high performance processors must anticipate changes in the flow of control before they actually occur. Branch prediction is the…”
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Dissertation -
9
Hiding synchronization delays in a GALS processor microarchitecture
Published in 10th International Symposium on Asynchronous Circuits and Systems, 2004. Proceedings (2004)“…We analyze an Alpha 21264-like globally-asynchronous, locally-synchronous (GALS) processor organized as multiple clock domain (MCD) microarchitecture and…”
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Conference Proceeding -
10
Enhancing branch prediction via on-line statistical analysis
Published 01-01-2002“…To attain peak efficiency, high performance processors must anticipate changes in the flow of control before they actually occur. Branch prediction is the…”
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Dissertation -
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Dynamically Trading Frequency for Complexity in a GALS Microprocessor
Published in 37th International Symposium on Microarchitecture (MICRO-37'04) (04-12-2004)“…Microprocessors are traditionally designed to provide "best overall" performance across a wide range of applications and operating environments. Several groups…”
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Conference Proceeding -
12
Adaptive Cache Memories for SMT Processors
Published in 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (01-09-2010)“…Resizable caches can trade-off capacity for access speed to dynamically match the needs of the workload. In Simultaneous Multi-Threaded (SMT) cores, the…”
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Conference Proceeding -
13
Managing static leakage energy in microprocessor functional units
Published in Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture (18-11-2002)“…Static energy due to subthreshold leakage current is projected to become a major component of the total energy in high performance microprocessors. Many…”
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Conference Proceeding -
14
Dynamic frequency and voltage control for a multiple clock domain microarchitecture
Published in Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture (18-11-2002)“…We describe the design, analysis, and performance of an on--line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD)…”
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Conference Proceeding -
15
Profile-based dynamic voltage and frequency scaling for a multiple clock domain microprocessor
Published in International Symposium on Computer Architecture: Proceedings of the 30th annual international symposium on Computer architecture; 09-11 June 2003 (01-05-2003)“…A Multiple Clock Domain (MCD) processor addresses the challenges of clock distribution and power dissipation by dividing a chip into several (coarse-grained)…”
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Conference Proceeding -
16
Profile-based dynamic voltage and frequency scaling for a multiple clock domain microprocessor
Published in 30th International Symposium on Computer Architecture (01-05-2003)“…A Multiple Clock Domain (MCD) processor addresses the challenges of clock distribution and power dissipation by dividing a chip into several (coarse-grained)…”
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Journal Article -
17
Linguistic support for heterogeneous parallel processing: a survey and an approach
Published in Proceedings Heterogeneous Computing Workshop (1994)“…Coding a highly parallel application to run on a heterogeneous suite of processors (both metacomputers and mixed-mode computers) with high efficiency, ease of…”
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Conference Proceeding