Search Results - "Domic, A."

Climate change and the distribution and conservation of the world's highest elevation woodlands in the South American Altiplano by Cuyckens, G.A.E., Christie, D.A., Domic, A.I., Malizia, L.R., Renison, D.

“…Climate change is becoming an increasing threat to biodiversity. Consequently, methods for delineation, establishment and management of protected areas must…”
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Keynote address by Domic, A.

“…The author describes how design, manufacturing, and test can join forces, and collaborate to battle the nanometer challenges in the semiconductor industry…”
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Panel and embedded tutorial - Logic synthesis and place and route: After 20 years of engagement, wedding in view? by Casale-Rossi, M, Domic, A

“…The first half of the 80's marked a fundamental milestone in the history of design implementation: an amazing number of key research papers were published, in…”
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Panel: What is EDA doing for trailing edge technologies? by Casale-Rossi, M., Domic, A., Rolandi, P., Kress, P., Bruening, A., Sebeke, C.

“…Over the last decade, the semiconductor industry has advanced CMOS technology from 90 to 22/20 nanometers, and the EDA industry has developed a great deal of…”
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On the relationship among accuracy, tolerance and compensation in the deep sub-micron era by Hill, D., Domic, A.

“…Historically, ASIC solutions tended to be effective because the physics and scale of most production technologies allowed circuit designers (and circuit design…”
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A simple algorithm for fanout optimization using high-performance buffer libraries by Kodandapani, K., Grodstein, J., Domic, A., Touati, H.

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Panel: "DFM/DFY: Should You Trust the Surgeon or the Family Doctor?" by Aitken, R., Domic, A., Guardiani, C., Magarshack, P., Pattullo, D., Sawicki, J.

“…Everybody agrees that curing DFM/DFY issues is of paramount importance at 65 nanometers and beyond. Unfortunately, there is disagreement about how and when to…”
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Layout synthesis of MOS digital cells by Domic, A.

“…The main issues specific to the cell generation of MOS digital circuits are reviewed. The discussion concentrates on the direct use of arbitrary cells, or the…”
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Power crisis in SoC design: strategies for constructing low-power, high-performance SoC designs by Brock, K., Edwards, C., Lannoo, R., Schlichtmann, U., Domic, A., Benkoski, J., Overhauser, D., Kliment, M.

“…This special panel session brings together several leading technologists to discuss the challenges and solutions in constructing SoC designs that achieve their…”
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A simple algorithm for fanout optimization using high-performance buffer libraries by Kodandapani, K., Grodstein, J., Domic, A., Touati, H.

“…We present an algorithm for computing minimal-area fanout networks satisfying a delay constraint. We focus on one type of fanout network structure, the fanout…”
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Nanometer design: place your bets by Kahng, Andrew B., Borkar, Shekhar, Cohn, John, Domic, Antun, Groeneveld, Patrick, Scheffer, Louis, Schoellkopf, Jean-Pierre

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CLEO: a CMOS layout generator by Domic, A., Levitin, S., Phillips, N., Thai, C., Shiple, T., Bhavsar, D., Bissel, C.

“…A description is given of CLEO, an automatic CMOS layout generator that takes as input an arbitrary sized circuit schematic and produces a CMOS layout as one…”
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The frequency of lesions to molar furcations in patients with periodontal disease by Bacić, M, Domić, A, Sutalo, J

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