VF bipolar integrated circuits

VF bipolar integrated circuits

The comparison of new active pull-down ECL (APD ECL) circuits is given in this paper. We carried out the SPICE simulation using the 0.8 /spl mu/m bipolar parameters to compare the time delay of various APD-ECL circuits versus load capacitance. In addition to our results in comparison of latest ECL t...

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Bibliographic Details
Published in:4th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services. TELSIKS'99 (Cat. No.99EX365) Vol. 2; pp. 396 - 399 vol.2
Main Authors: Banovic, N., Dokic, B.L.
Format: Conference Proceeding
Language:English
Published: IEEE 1999
Subjects:
Bipolar integrated circuits
Capacitance
Capacitors
Circuit simulation
Energy consumption
Feedback circuits
Logic
Resistors
SPICE
Switches
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Summary:The comparison of new active pull-down ECL (APD ECL) circuits is given in this paper. We carried out the SPICE simulation using the 0.8 /spl mu/m bipolar parameters to compare the time delay of various APD-ECL circuits versus load capacitance. In addition to our results in comparison of latest ECL topologies, this paper also presents a review of contemporary achievements in the field of high-speed of very fast (VF) integrated circuits, especially with heterostructure junctions.
ISBN:078035768X
9780780357686
DOI:10.1109/TELSKS.1999.806238