Search Results - "Deleonibus, Simon"

Looking into the future of Nanoelectronics in the Diversification Efficient Era by Deleonibus, Simon

“…The linear scaling of CMOS has encountered, since its beginning, many hurdles which request new process modules, driven mainly by the maximization of energy…”
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The Energy and Variability Efficient Era (E.V.E.) is Ahead of Us by Deleonibus, Simon

“…Major power consumption reduction will drive future design of technologies and architectures that will request less greedy devices and interconnect systems…”
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Ultra-thin films and multigate devices architectures for future CMOS scaling by Deleonibus, Simon

“…The nanoelectronics industry is facing historical challenges to scale down CMOS devices to meet demands for low voltage, low power, high performance and…”
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Size Dependence of Surface-Roughness-Limited Mobility in Silicon-Nanowire FETs by Poli, S., Pala, M.G., Poiroux, T., Deleonibus, S., Baccarani, G.

“…Lateral size effects on surface-roughness-limited mobility in silicon-nanowire FETs are analyzed by means of a full- quantum 3-D self-consistent simulation. A…”
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Experimental Investigation on the Quasi-Ballistic Transport: Part I-Determination of a New Backscattering Coefficient Extraction Methodology by Barral, V., Poiroux, T., Saint-Martin, J., Munteanu, D., Autran, J.-L., Deleonibus, S.

“…A new fully experimental method to determine the backscattering coefficient and the ballistic ratio of n- and p-FDSOI and multigate nanodevices is proposed in…”
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Foreword by Deleonibus, Simon

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Editor’s note by Huang, Ru, Iwai, Hiroshi, Claeys, Cor, Deleonibus, Simon, Wang, Runsheng

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Editor’s note by Huang, Ru, Iwai, Hiroshi, Claeys, Cor, Deleonibus, Simon, Wang, Runsheng

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Editor’s note by Huang, Ru, Iwai, Hiroshi, Claeys, Cor, Deleonibus, Simon, Wang, Runsheng

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Editor＇s note by Ru HUANG Hiroshi IWAI Cor CLAEYS Simon DELEONIBUS Runsheng WANG

“…Over the past 50 years,the microelectronics technology has recognized rapid development,resulting in a successful Si-based integrated circuit（IC）industry,with…”
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Towards a World of More Functions in Integrated Sustainable Systems by Deleonibus, Simon

“…Major power consumption reduction will drive future design of technologies and architectures that will request less greedy devices and interconnect systems…”
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Experimental Investigation on the Quasi-Ballistic Transport: Part II-Backscattering Coefficient Extraction and Link With the Mobility by Barral, V., Poiroux, T., Munteanu, D., Autran, J.-L., Deleonibus, S.

“…Using a new extraction methodology taking into account multisubband population and carrier degeneracy, we have experimentally determined backscattering…”
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Differential body effect analysis and optimization of the LArge Tilt Implanted Sloped Shallow Trench Isolation Process (LATI-STI) by DELEONIBUS, S, HEITMANN, M, GOBIL, Y, MARTIN, F, DEMOLLIENS, O, GUIBERT, J.-C, TOFFOLI, A

“…The optimization of a LArge Tilt Implanted Sloped shallow Trench Isolation (LATI-STI) process for Non Volatile Memories is presented. The process uses 70°…”
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High pressure high temperature steam oxidation poly buffer LOCOS (HP-HTPBL) field isolation process for reduced encroachment and low stress by DELEONIBUS, S, MARTIN, F, KIM, S. S, EMAMI, A, FLORIN, B, HEITZMANN, M, LEROUX, C

“…The characterization of High Pressure-High Temperature Poly Buffer LOCOS (HP-HTPBL) isolation for 0.2 µ m design rules Non Volatile Memories is presented…”
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Experimental evaluation of gate architecture influence on DG SOI MOSFETs performance by Widiez, J., Lolivier, J., Vinet, M., Poiroux, T., Previtali, B., Dauge, F., Mouis, M., Deleonibus, S.

“…Using a novel process flow, we managed to cointegrate several devices on the same wafer; single gate (SG), ground plane (GP), perfectly aligned double gate…”
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Experimental comparison between sub-0.1-μm ultrathin SOI single-and double-gate mosfets : Performance and mobility by WIDIEZ, Julie, POIROUX, Thierry, VINET, Maud, MOUIS, Mireille, DELEONIBUS, Simon

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On the mobility in high- κ/metal gate MOSFETs: Evaluation of the high- κ phonon scattering impact by Weber, Olivier, Cassé, Mikael, Thevenod, Laurent, Ducroquet, Frédérique, Ernst, Thomas, Deleonibus, Simon

“…We report an experimental study of the mobility in TiN/HfO 2 gate stacks focused on the accurate determination of the HfO 2 remote soft phonon scattering…”
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Multi-Channel Field-Effect Transistor (MCFET)-Part I: Electrical Performance and Current Gain Analysis by Bernard, E., Ernst, T., Guillaumot, B., Vulliet, N., Coronel, P., Skotnicki, T., Deleonibus, S., Faynot, O.

“…Multi-Channel Field-Effect Transistor (MCFET) structures with ultralow I OFF (16 pA/mum) and high I ON (N: 2.27 mA/mum and P: 1.32 mA/mum) currents are…”
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Integration of diamond in fully-depleted silicon-on-insulator technology as buried insulator: A theoretical analysis by Mazellier, Jean-Paul, Faynot, Olivier, Cristoloveanu, Sorin, Deleonibus, Simon, Bergonzo, Philippe

“…We examine here by electro-thermal simulation tools (SILVACO's Atlas) a configuration of Silicon-On-Insulator substrate for Fully-Depleted MOSFET…”
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Static and Dynamic TCAD Analysis of IMOS Performance: From the Single Device to the Circuit by Mayer, F., Le Royer, C., Le Carval, G., Clavelier, L., Deleonibus, S.

“…Impact ionization MOSFET (IMOS) is a device that enables to reach subthreshold slopes as small as 5 mV/dec. This device has an asymmetric doping profile, and…”
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