Search Results - "Deivasigamani, Ravi"

120V Low Side LDMOS Device with Sided Isolation of 0.35μm CMOS Compatible Process by Deivasigamani, Ravi, Sheu, Gene, Aryadeep, Chirag, Sai, S. Krishna, Selvendran, S., Yang, Shao-Ming

“…In this paper, a novel 120V multiple RESURF lateral double-diffused MOS (LDMOS) transistor with shallow trench isolation (STI) structure in low side is…”
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Analysis of Anti-JFET for 600V VDMOS and HCI Reliability by Yang, Shao-Ming, Sheu, Gene, Lai, Chiu-Chung, Deivasigamani, Ravi

“…In VDMOS device the anti-JFET concentration has important role for determining the breakdown voltage and on-resistance of the device. Because higher N-drift…”
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Study of HCI Reliability for PLDMOS by Deivasigamani, Ravi, Sheu, Gene, Aanand, Wei Lu, Shao, Sarwar Imam, Syed, Lai, Chiu-Chung, Yang, Shao-Ming

“…In this paper, we demonstrate electrical degradation due to hot carrier injection (HCI) stress for PLDMOS device. The lower gate current and the IDsat…”
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Analysis of Kirk effect of an innovated high side Side-Isolated N-LDMOS device by Lai, Ciou Jhong, Sheu, Gene, Chien, Ting Yao, Wu, Chieh Chih, Lee, Tzu Chieh, Deivasigamani, Ravi, Wu, Ching Yuan, Chandrashekhar, Yang, Shao Ming

“…An ESOA of LDMOS device is very critical for power device performance. Kirk effect is the one of the major problem which leads to poor ESOA performance. The…”
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