Search Results - "De Souza, Michelly"
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1
Analysis of the leakage current in junctionless nanowire transistors
Published in Applied physics letters (11-11-2013)“…This letter presents an analysis of the leakage current in Junctionless Nanowire Transistors. The analysis is performed using experimental data together with…”
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Journal Article -
2
From conservatism to support for gay conversion therapy: the role of prejudice and beliefs about same-sex sexuality
Published in The Journal of social psychology (02-11-2022)“…Support for Gay Conversion Therapy may be motivated by homophobic prejudice driven by conservative groups. We propose that Support for Gay Conversion Therapy…”
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3
Variability Modeling in Triple-Gate Junctionless Nanowire Transistors
Published in IEEE transactions on electron devices (01-08-2022)“…This work aims at proposing an analytical model for the variability of the threshold voltage and drain current in junctionless nanowire transistors. The model…”
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4
Junctionless Multiple-Gate Transistors for Analog Applications
Published in IEEE transactions on electron devices (01-08-2011)“…This paper presents the evaluation of the analog properties of nMOS junctionless (JL) multigate transistors, comparing their performance with those exhibited…”
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5
On the Application of Junctionless Nanowire Transistors in Basic Analog Building Blocks
Published in IEEE transactions on nanotechnology (2021)“…In this work an evaluation of analog building blocks using junctionless nanowire transistors is presented. This analysis has been carried out through…”
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6
Analytical Model for the Dynamic Behavior of Triple-Gate Junctionless Nanowire Transistors
Published in IEEE transactions on electron devices (01-02-2016)“…This paper presents an analytical model for the intrinsic capacitances and transconductances of triple-gate junctionless nanowire transistors. The model is…”
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7
Surface-Potential-Based Drain Current Analytical Model for Triple-Gate Junctionless Nanowire Transistors
Published in IEEE transactions on electron devices (01-12-2012)“…This paper proposes a drain current model for triple-gate n-type junctionless nanowire transistors. The model is based on the solution of the Poisson equation…”
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8
Involvement of neutrophils in Chagas disease pathology
Published in Parasite immunology (01-12-2018)“…Chagas disease (CD) is a public health problem in Latin America. The acute phase presents nonspecific symptoms and most patients recover from acute parasitemia…”
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9
A New Method for Series Resistance Extraction of Nanometer MOSFETs
Published in IEEE transactions on electron devices (01-07-2017)“…This paper presents a new method for the series resistance extraction in ultimate MOSFETs using a single drain current versus gate voltage characteristic…”
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10
High Temperature and Width Influence on the GIDL of Nanowire and Nanosheet SOI nMOSFETs
Published in IEEE journal of the Electron Devices Society (01-01-2023)“…In this work, an experimental evaluation of Gate-Induce Drain Leakage (GIDL) current is presented for nanowire and nanosheet-based SOI transistors. The effects…”
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11
The zero temperature coefficient in junctionless nanowire transistors
Published in Applied physics letters (06-08-2012)“…This Letter presents an analysis of the zero temperature coefficient (ZTC) bias in junctionless nanowire transistors (JNTs). Unlike in previous works, which…”
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12
Prevalence of hepatitis B and C seropositivity in pregnant women
Published in Revista da Escola de Enfermagem da U S P (01-02-2014)“…The aim of the study was to identify the prevalence of hepatitis B and C seropositivity in pregnant women attended in a public maternity hospital located in…”
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13
Cryogenic Operation of Junctionless Nanowire Transistors
Published in IEEE electron device letters (01-10-2011)“…This letter presents the properties of nMOS junctionless nanowire transistors (JNTs) under cryogenic operation. Experimental results of drain current,…”
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14
An explicit multi-exponential model for semiconductor junctions with series and shunt resistances
Published in Microelectronics and reliability (01-12-2011)“…A model with arbitrary ideality factor values whose explicit nature affords higher computational efficiency than conventional implicit model and is…”
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15
FOSS EKV2.6 Verilog-A Compact MOSFET Model
Published in ESSDERC 2019 - 49th European Solid-State Device Research Conference (ESSDERC) (01-09-2019)“…The EKV2.6 MOSFET compact model has had a considerable impact on the academic and industrial community of analog integrated circuit design, since its inception…”
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Conference Proceeding -
16
Experimental Comparison of Threshold Voltage Extraction Methods in SOI Nanowire Transistors
Published in 2023 37th Symposium on Microelectronics Technology and Devices (SBMicro) (28-08-2023)“…The threshold voltage is a key parameter for MOSFET modeling and can be extracted by several methods reported in the literature. However, for a given device,…”
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Conference Proceeding -
17
Electrical Characterization of Ω-Gate Nanowire MOSFETs Down to Cryogenic Temperatures
Published in 2023 37th Symposium on Microelectronics Technology and Devices (SBMicro) (28-08-2023)“…This work presents the electrical characterization of Ω-gate SOI nanowire MOSFETs in the temperature range from 82 K to 330 K. Devices with different fin…”
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Conference Proceeding -
18
Extraction of Drain Current Variability Components in Junctionless Nanowire Transistors
Published in 2023 International Conference on Noise and Fluctuations (ICNF) (17-10-2023)“…This work investigates the applicability of a recent drain current mismatch model developed for inversion mode FDSOI transistors to junctionless nanowire…”
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Conference Proceeding -
19
Junctionless Nanowire Transistors Based Common-Source Current Mirror
Published in 2021 35th Symposium on Microelectronics Technology and Devices (SBMicro) (23-08-2021)“…In this article, a current mirror built with junctionless nanowire transistors (JNTs) is investigated for the first time. The study explores the influence of…”
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Conference Proceeding -
20
Linearity Enhancement in Asymmetric Self-Cascode Composed by FD SOI nMOSFETs
Published in 2018 33rd Symposium on Microelectronics Technology and Devices (SBMicro) (01-08-2018)“…In this paper, the linearity of the Asymmetric SelfCascode composed by Fully Depleted SOI nMOSFETs is experimentally evaluated, using transistors with…”
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Conference Proceeding