Search Results - "De Robertis, G."

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    A MOdular System for Acquisition, Interface and Control (MOSAIC) of detectors and their related electronics for high energy physics experiment by Robertis, G. De, Fanizzi, G., Loddo, F., Manzari, V., Rizzi, M.

    Published in EPJ Web of Conferences (01-01-2018)
    “…In this work the MOSAIC (“MOdular System for Acquisition, Interface and Control”) board, designed for the readout and testing of the pixel modules for the…”
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    Journal Article Conference Proceeding
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    A Verification Platform to provide the Functional, Characterization and Production testing for the VFAT3 ASIC by Petrow, H., Aspell, P., Bravo, C., Dabrowski, M., Lentdecker, G. De, Leroux, P., Robertis, G. De, Irshad, A., Lenzi, T., Licciulli, F., Loddo, F., Robert, F., Tavernier, F., Rosa, J., Tuuva, T.

    “…VFAT3 is a front-end ASIC designed for the readout of GEM detectors in the CMS Muon system. The strategy for the chip design was to design the full chip at…”
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    Conference Proceeding
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    A new front-end ASIC for GEM detectors with time and charge measurement capabilities by Ciciriello, F., Corsi, F., De Robertis, G., Felici, G., Loddo, F., Marzocca, C., Matarrese, G., Ranieri, A.

    “…A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility…”
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    Journal Article
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    Design and submission of rad-tolerant circuits for future front-end electronics at S-LHC by Gabrielli, A., Loddo, F., Ranieri, A., De Robertis, G.

    “…This work is aimed at defining the architecture of a new digital ASIC, namely Slow Control Architecture (SCA), which will be designed and fabricated in a…”
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    Journal Article
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    Latest results of SEE measurements obtained by the STRURED demonstrator ASIC by Candelori, A., De Robertis, G., Gabrielli, A., Mattiazzo, S., Pantano, D., Ranieri, A., Tessaro, M.

    “…With the perspective to develop a radiation-tolerant circuit for High Energy Physics (HEP) applications, a test digital ASIC VLSI chip, called STRURED, has…”
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    Journal Article
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    Architecture of a Slow-Control ASIC for Future High-Energy Physics Experiments at SLHC by Gabrielli, A., De Robertis, G., Fiore, D., Loddo, F., Ranieri, A.

    Published in IEEE transactions on nuclear science (01-06-2009)
    “…This work is aimed at defining the architecture of a new digital ASIC, namely slow control logic (SCL), which will be designed and fabricated in a commercial…”
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    Journal Article
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