Search Results - "Daewoong Kang"

A Novel Structure Between WL Spaces to Improve the Retention Characteristics in 3D NAND Flash by Suh, Yunejae, Kyung, Hyewon, Jung, Youngho, Kang, Daewoong

“…As NAND flash evolved from two-dimensional (2D) to three-dimensional (3D), all cells have been changed to share a charge trap layer (CTL). This change has a…”
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Improvement of Retention Characteristics Using Doped SiN Layer Between WL Spaces in 3D NAND Flash by Kyung, Hyewon, Suh, Yunejae, Jung, Youngho, Kang, Daewoong

“…We propose a novel structure of a charge trapping layer, that is doped between Word Line(WL) spaces in 3D NAND flash memory. To estimate the retention…”
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Investigation of poly silicon channel variation in Vertical 3D NAND flash memory by Lee, Inyoung, Kim, Dae Hwan, Kang, Daewoong, Cho, Il Hwan

“…Since the most of three dimensional (3D) NAND devices' channel is composed of polysilicon grain, the actual 3D NAND channel has a wave-shaped channel, not…”
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3D NAND Flash Memory Cell Current and Interference Characteristics Improvement With Multiple Dielectric Spacer by Oh, Yun-Jae, Lee, Inyoung, Suh, Yunejae, Kang, Daewoong, Cho, Il Hwan

“…To achieve high density, the spacer length of three dimensional (3D) NAND device has been scaled down. When the program/erase cycle repeats, problems such as…”
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Neuropeptides Involved in Facial Nerve Regeneration by Kim, Inhyeok, Kim, Yonjae, Kang, Daewoong, Jung, Junyang, Kim, Sungsoo, Rim, Hwasung, Kim, Sanghoon, Yeo, Seung-Geun

“…Neuropeptides and neurotransmitters act as intermediaries to transmit impulses from one neuron to another via a synapse. These neuropeptides are also related…”
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Independent Double-Gate Fin SONOS Flash Memory Fabricated With Sidewall Spacer Patterning by Yun, Jang-Gn, Kim, Yoon, Park, Il Han, Lee, Jung Hoon, Kang, Daewoong, Lee, Myoungrack, Shin, Hyungcheol, Lee, Jong Duk, Park, Byung-Gook

“…Fin silicon-oxide-nitride-oxide-semiconductor (SONOS) flash memories having independent double gates are fabricated and characterized. This device has two…”
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Extraction of Vertical, Lateral Locations and Energies of Hot-Electrons-Induced Traps through the Random Telegraph Noise by Kang, Daewoong, Kim, Jinho, Lee, Duckhyung, Park, Byung-Gook, Lee, Jong Duk, Shin, Hyungcheol

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Improvement of cell characteristics using controlling the current path in 3D NAND flash by Park, Hyojin, Lee, Inyoung, Cho, Il Hwan, Kang, Daewoong

“…In vertical-NAND (V-NAND) flash memory, the effect of current path change according to the program state was analyzed. A new memory structure in which a…”
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Device characteristics of the select transistor in a vertical-NAND flash memory by Kang, Daewoong, Park, Hyojin, Kim, Dae Hwan, Cho, Il Hwan

“…In this paper, variation in the parameters of the select transistor of a vertical-NAND (V-NAND) flash memory device is investigated for device optimization and…”
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A new approach of NAND flash cell trap analysis using RTN characteristics by Daewoong Kang, Sungbok Lee, Hyun-Mog Park, Dong-jun Lee, Jun Kim, Junho Seo, Chikyoung Lee, Cheol Song, Chang-Sub Lee, Hyungcheol Shin, Jaihyuk Song, Haebum Lee, Jeong-Hyuk Choi, Young-Hyun Jun

“…We measured RTN characteristics in NAND flash cell array and test structure having 27 nm design rule depending on different program and erase states. From…”
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Improving the cell characteristics using arch-active profile in NAND flash memory having 60 nm design-rule by Kang, Daewoong, Shin, Hyungcheol

“…Recently the cell integration density of NAND flash memory is increasing rapidly due to its simple structure, which is suitable for high resolution…”
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Improving the cell characteristics using arch-active profile in NAND flash memory having 60nm design-rule by Kang, Daewoong, Shin, Hyungcheol

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Improving the Endurance Characteristics Through Boron Implant at Active Edge in 1 G NAND Flash by Daewoong Kang, Sungnam Chang, Seunggun Seo, Yongwook Song, Hojin Yoon, Eunjung Lee, Dongwon Chang, Wonseong Lee, Byung-Gook Park, Jong Duk Lee, Il Han Park, Sangwoo Kang, Hyungcheol Shin

“…One of the most important issues of NAND flash memory is reliability problems caused by oxide and interface traps. But it has been revealed that their…”
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A new approach for trap analysis of vertical NAND flash cell using RTN characteristics by Daewoong Kang, Changsub Lee, Sunghoi Hur, Duheon Song, Jeong-Hyuk Choi

“…We introduce new phenomena that show turn-on at back-side for Vertical NAND (V-NAND) with back-insulator and propose a new method to analyze the trap of…”
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Noise in nano-scale MOSFETs and flash cells by Hyungcheol Shin, Seungwon Yang, Jongwook Jeon, Daewoong Kang

“…In this paper, we present a compact channel thermal noise model for short-channel MOSFETs which takes into account various short channel effects. Then, we…”
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The Air Spacer Technology for Improving the Cell Distribution in 1 Giga Bit NAND Flash Memory by Daewoong Kang, Hyungcheol Shin, Sungnam Chang, Jungjoo An, Kyongjoo Lee, Jinjoo Kim, Eunsang Jeong, Hyukje Kwon, Eunjung Lee, Seunggun Seo, Wonseong Lee

“…Recently the cell integration density of NAND flash memory increases rapidly due to its simple structure suitable for high resolution lithography. However as…”
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Extraction of location and energies of traps in nanoscale flash memory using RTN by Daewoong Kang, Sungnam Chang, Seungwon Yang, Eunjung Lee, Seunggun Seo, Jeong-Hyuk Choi, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin

“…Recently, several reports have been published on RTS noise which brings about large Vu, fluctuation in floating gate flash memory. However, they have primarily…”
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Improving the Cell Characteristics Using SiN Liner at Active Edge in 4 Gbits NAND Flash Memories by Kang, Daewoong, Jang, Sungnam, Lee, Kyongjoo, Kim, Jinjoo, Chang, Dongwon, Kwon, Hyukje, Lee, Wonseong, Park, Il-Han, Kim, Jun Su, Lee, Jae Hong, Park, Byung-Gook, Lee, Jong Duk, Shin, Hyungcheol

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Improving the Cell Characteristics Using Low-k Gate Spacer in 1Gb NAND Flash Memory by Kang, D., Jang, S., Lee, K., Kim, J., Kwon, H., Lee, W., Park, B.G., Lee, J.D., Shin, H.

“…Floating gate interference resulting from capacitive coupling through parasitic capacitors surrounding the floating gate degrades the cell characteristics such…”
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Improving the cell characteristics using arch-active profile in NAND flash memory having 60.nm design rule by Daewoong Kang, Sungnam Chang, Jung Hoon Lee, Il Han Park, Seunggun Seo, Gideok Kwon, Kyungmi Bae, Inyoung Kim, Eunjung Lee, Jeong-Hyuk Choi, Byung-Gook Park, Jong Duk Lee, Hyungcheol Shin

“…Recently the cell integration density of NAND flash memory is increasing rapidly due to its simple structure suitable for high resolution lithography…”
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