Search Results - "D’Silva, Vijay"

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  1. 1

    Abstract Interpretation as Automated Deduction by D’Silva, Vijay, Urban, Caterina

    Published in Journal of automated reasoning (01-03-2017)
    “…Automata theory, algorithmic deduction and abstract interpretation provide the foundation behind three approaches to implementing program verifiers. This…”
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    Journal Article
  2. 2

    Deciding floating-point logic with abstract conflict driven clause learning by Brain, Martin, D’Silva, Vijay, Griggio, Alberto, Haller, Leopold, Kroening, Daniel

    Published in Formal methods in system design (01-10-2014)
    “…We present a bit-precise decision procedure for the theory of floating-point arithmetic. The core of our approach is a non-trivial, lattice-theoretic…”
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    Journal Article
  3. 3

    A Survey of Automated Techniques for Formal Software Verification by D'Silva, V., Kroening, D., Weissenbacher, G.

    “…The quality and the correctness of software are often the greatest concern in electronic systems. Formal verification tools can provide a guarantee that a…”
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    Journal Article
  4. 4

    A lazy approach to symmetry reduction by Wahl, Thomas, D’Silva, Vijay

    Published in Formal aspects of computing (01-11-2010)
    “…Symmetry reduction is a technique to counter state explosion for systems with regular structure. It relies on idealistic assumptions about indistinguishable…”
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    Journal Article
  5. 5

    The Correctness-Security Gap in Compiler Optimization by D'Silva, Vijay, Payer, Mathias, Song, Dawn

    Published in 2015 IEEE Security and Privacy Workshops (01-05-2015)
    “…There is a significant body of work devoted to testing, verifying, and certifying the correctness of optimizing compilers. The focus of such work is to…”
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    Conference Proceeding
  6. 6

    Logical abstract interpretation by D'Silva, Vijay Victor

    Published 01-01-2013
    “…Logical deduction and abstraction from detail are fundamental, yet distinct aspects of reasoning about programs. This dissertation shows that the combination…”
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    Dissertation
  7. 7

    A Formal Approach To The Protocol Converter Problem by Avnit, Karin, D'Silva, Vijay, Sowmya, Arcot, Ramesh, S., Parameswaran, Sri

    Published in 2008 Design, Automation and Test in Europe (01-03-2008)
    “…In the absence of a single module interface standard, integration of pre-designed modules in System-on-Chip design often requires the use of protocol…”
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    Conference Proceeding
  8. 8

    Fixed points for multi-cycle path detection by D'Silva, V., Kroening, D.

    “…Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating…”
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    Conference Proceeding
  9. 9

    BLITZ: Compositional bounded model checking for real-world programs by Chia Yuan Cho, D'Silva, Vijay, Song, Dawn

    “…Bounded Model Checking (BMC) for software is a precise bug-finding technique that builds upon the efficiency of modern SAT and SMT solvers. BMC currently does…”
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    Conference Proceeding
  10. 10

    Abstract Interpretation with Unfoldings by Sousa, Marcelo, Rodríguez, César, D'Silva, Vijay, Kroening, Daniel

    Published 01-05-2017
    “…We present and evaluate a technique for computing path-sensitive interference conditions during abstract interpretation of concurrent programs. In lieu of…”
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    Journal Article
  11. 11

    Synchronous protocol automata: a framework for modelling and verification of SoC communication architectures by D'silva, V., Ramesh, S., Sowmya, A.

    “…Plug-n-Play style Intellectual Property (IP) reuse in System on Chip (SoC) design is facilitated by the use of an on-chip bus architecture. We present a…”
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    Conference Proceeding
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  16. 16

    A formal approach to the protocol converter problem by Avnit, Karin, D'Silva, Vijay, Sowmya, Arcot, Ramesh, S., Parameswaran, Sri

    “…In the absence of a single module interface standard, integration of pre-designed modules in System-on-Chip design often requires the use of protocol…”
    Get full text
    Conference Proceeding
  17. 17

    Synchronous Protocol Automata: A Framework for Modelling and Verification of SoC Communication Architectures by D'silva, Vijay, Ramesh, S., Sowmya, Arcot

    “…Plug-n-Play style Intellectual Property (IP) reuse in System on Chip (SoC) design is facilitated by the use of an on-chip bus architecture. We present a…”
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    Conference Proceeding
  18. 18

    Bridge over troubled wrappers:automated interface synthesis by D'silva, V., Ramesh, S., Sowmya, A.

    “…System-on-Chip (SoC) design methodologies rely heavily on reuse of intellectual property (IP) blocks. IP reuse is a labour intensive and time consuming process…”
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    Conference Proceeding