Search Results - "Crastes de Paulet, M."
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Input-driven partitioning methods and application to synthesis on table-lookup-based FPGAs
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01-07-1993)“…A synthesis approach for a set of Boolean functions on table-lookup-based field programmable gate arrays is proposed. Synthesis is considered as a global…”
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Journal Article -
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ASYL: A Rule-Based System for Controller Synthesis
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01-11-1987)“…A rule-based approach has been investigated for two items of the synthesis area: the state assignment of controllers and the logic minimization. Local…”
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Journal Article -
3
Resource assignment with different target architectures
Published in Euro ASIC '91 (1991)“…A flexible approach for resource assignment is presented. This approach may be applied to bus based or MUX based target architectures with various options on…”
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Conference Proceeding
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4
Hierarchical test generation for data path
Published in [Proceedings] EURO ASIC `90 (1990)“…A method of hierarchical test generation for data path is proposed. The test patterns are generated for the basic blocks of a classical data path library…”
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Conference Proceeding -
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Testability expertise and test planning from high-level specifications
Published in Proceedings. 'Meeting the Tests of Time'., International Test Conference (1989)“…The testability expertise of boards and ASICs (application-specific integrated circuits) relies on high-level models in the Prolog language. This high-level…”
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Conference Proceeding