Search Results - "Connelly, J.A."

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  1. 1

    A noise-based IC random number generator for applications in cryptography by Petrie, C.S., Connelly, J.A.

    “…The design of a mixed-signal random number generator (RNG) integrated circuit (IC) suitable for integration with hardware cryptographic systems is presented…”
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    Journal Article
  2. 2

    Inhibition of plant acetyl-coenzyme A carboxylase by the herbicides sethoxydim and haloxyfop by Burton, J D, Gronwald, J W, Somers, D A, Connelly, J A, Gengenbach, B G, Wyse, D L

    “…Incorporation of [14C]acetate or [14C]pyruvate into fatty acids in isolated corn seedling chloroplasts was inhibited 90% or greater by 10 microM sethoxydim or…”
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    Journal Article
  3. 3

    Alterations in Memory and Impact on Academic Outcomes in Children Following Allogeneic Hematopoietic Cell Transplantation by Lajiness-O'Neill, R, Hoodin, F, Kentor, R, Heinrich, K, Colbert, A, Connelly, J A

    Published in Archives of clinical neuropsychology (01-11-2015)
    “…The prevalence of late effects following allogeneic hematopoietic cell transplantation (HCT), a curative treatment for pediatric leukemia, is high: 79% of HCT…”
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    Journal Article
  4. 4

    The sampling of noise for random number generation by Petrie, C.S., Connelly, J.A.

    “…A popular method for generating truly random numbers based on a natural phenomenon is the electronic amplification and sampling of a thermal or shot noise…”
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    Conference Proceeding
  5. 5

    An integrated analog/digital random noise source by Holman, W.T., Connelly, J.A., Dowlatabadi, A.B.

    “…An integrated noise source (INS) has been fabricated in a standard 1.2 /spl mu/m digital CMOS technology. Wideband white noise is generated from the amplified…”
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    Journal Article
  6. 6

    A compact low noise operational amplifier for a 1.2 /spl mu/m digital CMOS technology by Holman, W.T., Connelly, J.A.

    Published in IEEE journal of solid-state circuits (01-06-1995)
    “…A compact low noise operational amplifier using lateral p-n-p bipolar transistors in the input stage has been fabricated in a standard 1.2 /spl mu/m digital…”
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    Journal Article
  7. 7

    Isolation and characterization of two homoserine dehydrogenases from maize suspension cultures by Walter, T J, Connelly, J A, Gengenbach, B G, Wold, F

    Published in The Journal of biological chemistry (25-02-1979)
    “…Homoserine dehydrogenase in unpurified extracts of maize (Zea mays L.) cell suspensions is inhibited 73% by the feedback regulator threonine; the remaining 27%…”
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    Journal Article
  8. 8

    f/sup /spl alpha// noise source streamlines SPICE simulations by Thain, W.E., Connelly, J.A.

    Published in IEEE circuits and devices magazine (01-05-1996)
    “…The methodology described in this article for creating a PWL noise source is an effective way of generating general f/sup /spl alpha// noise for time-domain…”
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    Journal Article
  9. 9
  10. 10

    Reducing phase noise by proper sizing of MOSFETs in LC tuned VCOs by Ye-Ming Li, Connelly, J.A.

    “…This work identifies the relationships between the sizes of the oscillator's core MOSFETs and the phase noise in the 1/f region. Three packaged 1 GHz VCOs with…”
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    Conference Proceeding
  11. 11

    A compact low noise operational amplifier for a 1.2 μm digital CMOS technology by HOLMAN, W. T, CONNELLY, J. A

    Published in IEEE journal of solid-state circuits (01-06-1995)
    “…A compact low noise operational amplifier using lateral p-n-p bipolar transistors in the input stage has been fabricated in a standard 1.2 mu m digital n-well…”
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    Journal Article
  12. 12

    A MOS four-quadrant analog multiplier using the quarter-square technique by Pena-Finol, J.S., Connelly, J.A.

    Published in IEEE journal of solid-state circuits (01-12-1987)
    “…A circuit configuration for a four-quadrant analog multiplier in MOS integrated circuit technology is described. It is based on the quarter-square algebraic…”
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    Journal Article
  13. 13

    Reducing phase noise by proper sizing of MOSFETs in LC tuned VCOs by Ye-Ming Li, Connelly, J.A.

    “…This work identifies the relationships between the sizes of the oscillator's core MOSFETs and the phase noise in the 1/f/sup 2/ region. Three packaged 1 GHz…”
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    Conference Proceeding
  14. 14

    Computers in the laboratory-an automatic data acquisition system by Connelly, J.A.

    “…An automatic data acquisition system (ADAS) used by students in analog circuits and systems laboratories at the Georgia Institute of Technology, is described…”
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    Conference Proceeding
  15. 15

    A 128/spl times/128 imaging array using lateral bipolar phototransistors in a standard CMOS process [fingerprint detection] by Sandage, R.W., Connelly, J.A.

    “…A 128/spl times/128 element photodetector array has been fabricated using lateral bipolar phototransistors in a standard 1.2 /spl mu/m digital CMOS process…”
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    Conference Proceeding
  16. 16

    A novel tool for circuit-system modeling by Sandage, R.W., Connelly, J.A.

    “…A novel technique for modeling and simulating circuits and systems has been developed using LabVIEW(R) software. Complex analog circuits are modeled by their…”
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    Conference Proceeding
  17. 17

    A generic voltage comparator analog cell produced in standard digital CMOS technologies by Dowlatabadi, A.B., Connelly, J.A.

    “…A voltage comparator has been developed to be employed as an analog cell in standard digital CMOS processes. The design is generic to a variety of CMOS…”
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    Conference Proceeding
  18. 18

    A new CMOS differential amplifier circuit for improved slew rate performance by Pulkin, M.E., Connelly, J.A.

    “…A novel differential amplifier circuit topology is presented which features a low stand-by current, yet achieves a large signal current drive capability many…”
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    Conference Proceeding
  19. 19

    A high speed analog 50 /spl Omega/ line driver in digital CMOS technology by Payne, R.F., Connelly, J.A.

    “…A single-ended analog buffer designed to drive 50 /spl Omega/ loads is described. The circuit consists of a common source output pair driven by a pair of…”
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    Conference Proceeding
  20. 20

    Low voltage performance of a low noise operational amplifier in a 1.2 /spl mu/m digital CMOS technology by Holman, W.T., Connelly, J.A.

    “…A low noise operational amplifier using lateral PNP bipolar transistors has been fabricated in a 1.2 /spl mu/m digital CMOS process. Total circuit area is…”
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    Conference Proceeding