Search Results - "Compiet, J."

Analysis and experimental verification of digital substrate noise generation for epi-type substrates by van Heijningen, M., Compiet, J., Wambacq, P., Donnay, S., Engels, M.G.E., Bolsens, I.

“…Substrate coupling in mixed-signal IC's can cause important performance degradation of the analog circuits. Accurate simulation is therefore needed to…”
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Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits by Badaroglu, M., van Heijningen, M., Gravot, V., Compiet, J., Donnay, S., Gielen, G.G.E., De Man, H.J.

“…This paper describes substrate noise reduction techniques for synchronous CMOS circuits. Low-noise digital design techniques have been implemented and measured…”
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Flexible baseband Low-Pass Filter and Variable Gain Amplifier for Software Defined Radio Front End by Giannini, V., Craninckx, J., Compiet, J., Come, B., D'Amico, S., Baschirotto, A.

“…Analog blocks intended for software defined radio have to be targeted to multi-standard operation trying to guarantee at any time a near optimal…”
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Fully reconfigurable active-Gm-RC biquadratic cells for software defined radio applications by Giannini, V., Craninckx, J., Compiet, J., Come, B., D'Amico, S., Baschirotto, A.

“…The 4th generation of wireless systems needs low-power integrated transceivers that can be reconfigured in order to satisfy different standard requirements…”
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Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits by Badaroglu, M., van Heijningen, M., Gravot, V., Compiet, J., Donnay, S., Engels, M., Gielen, G., De Man, H.

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Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits by Badaroglu, M., van Heijningen, M., Gravot, V., Compiet, J., Donnay, S., Engels, M., Gielen, G., De Man, H.

“…An efficient substrate-noise-reduction technique for synchronous CMOS circuits shows >2/spl times/ noise reduction with penalties of 3% area and 4% power…”
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Modeling of digital substrate noise generation and experimental verification using a novel substrate noise sensor by van Heijningen, M., Compiet, J., Wambacq, P., Donnay, S., Engels, M., Bolsens, I.

“…Substrate coupling in mixed-signal ASICs can cause important performance degradation of the analog circuits. Accurate simulation is therefore needed to…”
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High-level modeling of a high-speed flash A/D converter for mixed-signal simulations of digital telecommunication front-ends by Compiet, J., de Jong, P., Wambacq, P., Vandersteen, G., Donnay, S., Engels, D.M., Bolsens, I.

“…A hierarchical high-level model of a high-speed flash ADC is presented. The input parameter list is extracted from a 400 MHz, 4-bit, flash ADC designed in…”
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A design experiment for measurement of the spectral content of substrate noise in mixed-signal integrated circuits by Van Heijningen, M., Caomiet, J., Wambacq, P., Donnay, S., Bolsens, I.

“…In mixed-signal ASICs coupling from switching digital nodes and from the digital power supply to analog circuits via the common substrate can degrade the…”
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