Search Results - "Colonna, J. P."

Impact of the national prevention policy and scrum law changes on the incidence of rugby-related catastrophic cervical spine injuries in French Rugby Union by Reboursiere, E, Bohu, Y, Retière, D, Sesboüé, B, Pineau, V, Colonna, J P, Hager, J P, Peyrin, J C, Piscione, J

“…Catastrophic cervical spine injuries are rare in rugby union but require close monitoring. The aim of this study was to analyse the incidence of severe…”
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Ultra-high four wave mixing efficiency in slot waveguides with silicon nanocrystals by Trita, A., Lacava, C., Minzioni, P., Colonna, J.-P., Gautier, P., Fedeli, J.-M., Cristiani, I.

“…We report on wavelength conversion through four-wave-mixing in silicon slot-waveguides with embedded silicon nanocrystals. The combination of strong optical…”
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Polarization strategies to improve the emission of Si-based light sources emitting at 1.55μm by Ramírez, J.M., Jambois, O., Berencén, Y., Navarro-Urrios, D., Anopchenko, A., Marconi, A., Prtljaga, N., Daldosso, N., Pavesi, L., Colonna, J.-P., Fedeli, J.-M., Garrido, B.

“…► We study the electroluminescence of LPCVD SiOx layers doped or not with Er ions. ► Direct current and pulsed voltage polarization have been used to compare…”
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Shaping circuit environment to face the thermal challenge Innovative technologies from low to high power electronics by Coudrain, P., Colonna, J.-P., Collin, L.-M., Prieto, R., Frechette, L.G., Barrau, J., Savelli, G., Vivet, P., Struss, Q., Widiez, J., Vladimirova, K., Triantopoulos, K., Beckrich-Ros, H., Vilarrubi, M., Laguna, G., Azarkish, H., Shirazi, M., Michailos, J.

“…This paper describes evolutions of circuit environment to face an ever-increasing thermal challenge, from early design stage down to the final package. To…”
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Performance and Modeling of Si-Nanocrystal Double-Layer Memory Devices With High- k Control Dielectrics by Gay, G., Molas, G., Bocquet, M., Jalaguier, E., Gely, M., Masarotto, L., Colonna, J. P., Grampeix, H., Martin, F., Brianceau, P., Vidal, V., Kies, R., Baron, T., Ghibaudo, G., De Salvo, B.

“…In this paper, memory devices integrating a double layer of silicon nanocrystals (Si-ncs) as a trapping medium and a HfAlO-based control dielectrics are…”
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Evaluation of HfAlO high- k materials for control dielectric applications in non-volatile memories by Molas, G., Bocquet, M., Buckley, J., Grampeix, H., Gély, M., Colonna, J.P., Martin, F., Brianceau, P., Vidal, V., Bongiorno, C., Lombardo, S., Pananakakis, G., Ghibaudo, G., De Salvo, B., Deleonibus, S.

“…In this paper, we evaluate the potentiality of hafnium aluminium oxide (HfAlO) high- k materials for control dielectric application in non-volatile memories…”
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Passivated TiN nanocrystals/SiN trapping layer for enhanced erasing in nonvolatile memory by Gay, G., Belhachemi, D., Colonna, J. P., Minoret, S., Brianceau, P., Lafond, D., Baron, T., Molas, G., Jalaguier, E., Beaurain, A., Pelissier, B., Vidal, V., De Salvo, B.

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Reliability of charge trapping memories with high- k control dielectrics (Invited Paper) by Molas, G., Bocquet, M., Vianello, E., Perniola, L., Grampeix, H., Colonna, J.P., Masarotto, L., Martin, F., Brianceau, P., Gély, M., Bongiorno, C., Lombardo, S., Pananakakis, G., Ghibaudo, G., De Salvo, B.

“…In this paper, we evaluate the potentiality of high- k materials (Al 2O 3, HfO 2 and HfAlO) for interpoly application in non-volatile memories. A study of the…”
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Thin micro-cold plate for hot-spot aware chip cooling by Collin, L.-M, Shirazy, Mahmood R. S., Colonna, J.-P, Coudrain, P., Cheramy, S., Souifi, A., Frechette, L. G.

“…This work proposes a non-invasive and hot spot aware cooling approach by stacking a micro-cold plate at the backside of a chip. With trends such as 3D stacking…”
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Study of parasitic trapping in alumina used as blocking oxide for nonvolatile memories by Colonna, J.-P., Bocquet, Marc, Molas, Gabriel, Rochat, N., Blaise, P., Grampeix, Helen, Licitra, Christophe, Lafond, D., Masoero, Lia, Vidal, Vincent, Barnes, Jean-Paul, Veillerot, M., Yckache, K.

“…Alumina layers deposited by Atomic Layer Deposition followed by Rapid Thermal anneal were characterized. We found that the crystallization of alumina in…”
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Thermal measurements on flip-chipped system-on-chip packages with heat spreader integration by Prieto, R., Colonna, J. P., Coudrain, P., Santos, C., Vivet, P., Cheramy, S., Campos, D., Farcy, A., Avenas, Y.

“…Amongst the cooling solutions proposed to mitigate heat hazard effects in microelectronics, heat spreaders seem to be one of the most suitable when thickness…”
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Defects-induced gap states in hydrogenated γ-alumina used as blocking layer for non-volatile memories by Masoero, L., Blaise, P., Molas, G., Colonna, J.P., Gély, M., Barnes, J.P., Ghibaudo, G., De Salvo, B.

“…In this work we used atomistic simulation to simulate a 160-atoms supercell of γ-Al 2O 3 with various potential defects. For each defect we computed the…”
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Towards efficient and reliable 300mm 3D technology for wide I/O interconnects by Coudrain, P., Colonna, J.-P, Aumont, C., Garnier, G., Chausse, P., Segaud, R., Vial, K., Jouve, A., Mourier, T., Magis, T., Besson, P., Gabette, L., Brunet-Manquat, C., Allouti, N., Laviron, C., Cheramy, S., Saugier, E., Pruvost, J., Farcy, A., Hotellier, N.

“…This paper presents the prototype of a 3D circuit with Wide I/O interconnects in a 65nm CMOS node, assembled in a face-to-back integration and reported on a…”
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New challenges and opportunities for 3D integrations by Michailos, J., Coudrain, P., Farcy, A., Hotellier, N., Cheramy, S., Lhostis, S., Deloffre, E., Sanchez, Y., Jouve, A., Guyader, F., Saugier, E., Fiori, V., Vivet, P., Vinet, M., Fenouillet-Beranger, C., Casset, F., Batude, P., Breuf, F., Henrion, Y., Vianne, B., Collin, L.-M, Colonna, J.-P, Benaissa, L., Brunet, L., Prieto, R., Velard, R., Ponthenier, F.

“…From low density 3D integrations embedding Via Last Through Silicon Vias (TSV) to high densities hybrid bonding or 3D VSLI CoolCubeTM solutions, a multitude of…”
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Investigation of charge-trap memories with AlN based band engineered storage layers by Molas, G., Colonna, J.P., Kies, R., Belhachemi, D., Bocquet, M., Gély, M., Vidal, V., Brianceau, P., Martinez, E., Papon, A.M., Licitra, C., Vandroux, L., Ghibaudo, G., De Salvo, B.

“…This paper presents the investigation of the electrical properties of charge-trap memories with AlN based storage layers. The memory performance and…”
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Impact of a HTO/Al2O3 bi-layer blocking oxide in nitride-trap non-volatile memories by BOCQUET, M, MOLAS, G, TOFFOLI, A, DELEONIBUS, S, GHIBAUDO, G, PANANAKAKIS, G, DE SALVO, B, PERNIOLA, L, GARROS, X, BUCKLEY, J, GELY, M, COLONNA, J. P, GRAMPEIX, H, MARTIN, F, VIDAL, V

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Thermal correlation between measurements and FEM simulations in 3D ICs by Souare, P. M., de Crecy, F., Fiori, V., Ben Jamaa, H., Farcy, A., Gallois-Garreignot, S., Borbely, A., Colonna, J.-P, Coudrain, P., Giraud, B., Laviron, C., Cheramy, S., Tavernier, C., Michailos, J.

“…This paper presents a comparison between electrical measurements, which are carried out with embedded in-situ sensors, and thermal numerical simulations. The…”
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Direct probing of trapped charge dynamics in SiN by Kelvin Force Microscopy by Vianello, E, Nowak, E, Mariolle, D, Chevalier, N, Perniola, L, Molas, G, Colonna, J P, Driussi, F, Selmi, L

“…In this work, we explore the potential of Kelvin Force Microscopy (KFM) measurements to investigate the lateral charge transport in SiN layers with two…”
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Thermal performance of CoolCube™ monolithic and TSV-based 3D integration processes by Santos, C., Vivet, P., Thuries, S., Billoint, O., Colonna, J.-P, Coudrain, P., Wang, L.

“…CoolCube™ is a monolithic 3D technology which has the potential to solve the interconnection density limitation of the existing TSV-based 3D integration…”
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Hot spot aware microchannel cooling add-on for microelectronic chips in mobile devices by Collin, L.-M, Colonna, J.-P, Coudrain, P., Shirazy, Mahmood R. S., Cheramy, S., Souifi, A., Fréchette, L. G.

“…This work proposes an experimental microchannel solution to cool microelectronic chips with hot spots, using a nonintrusive technique. In microelectronics,…”
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