A systematic exploration of the failure mechanisms in underfilled flip-chip packages

A study on failure mechanisms in underfilled flip-chip packages is presented here. The flip-chip packages were built after conducting a range of finite element modeling studies that varied only the geometric entities in the package. Thereafter, these packages were stressed under a thermal-cyclic loa...

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Bibliographic Details
Published in:	2015 IEEE 65th Electronic Components and Technology Conference (ECTC) pp. 1509 - 1517
Main Authors:	Sinha, Tuhin, Davis, Taryn J., Lombardi, Thomas E., Coffin, Jeffery T.
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01-05-2015
Subjects:	Assembly Failure analysis Flip-chip devices Laminates Reliability Silicon Stress
Online Access:	Get full text
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Summary:	A study on failure mechanisms in underfilled flip-chip packages is presented here. The flip-chip packages were built after conducting a range of finite element modeling studies that varied only the geometric entities in the package. Thereafter, these packages were stressed under a thermal-cyclic loading condition and were probed for electrical failures during the course of thermal cycling. The finite element analysis' thermal cyclic modeling simulations show a good correlation between the predicted plastic-energy dissipation per unit volume in the solder stack and the measured electrical and physical failures in the packages. The empirical correlations developed in this study can be extended to a generic package for predicting the failures associated with reliability either during testing or under field operating conditions.
ISSN:	0569-5503 2377-5726
DOI:	10.1109/ECTC.2015.7159798