Search Results - "Ciobanu, Catalin Bogdan"
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Innovative HDL Lessons Targeting the terasIC DE10-Lite Intel FPGA Platform
Published in 2023 IEEE 29th International Symposium for Design and Technology in Electronic Packaging (SIITME) (18-10-2023)“…This work introduces students to hardware description languages and the integration of custom components in terasIC DE10-Lite FPGA boards using Quartus,…”
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Conference Proceeding -
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Chiplets and Next-gen Packaging Technologies in University Education
Published in 2023 IEEE 29th International Symposium for Design and Technology in Electronic Packaging (SIITME) (18-10-2023)“…Gordon Moore famously predicted in his "Moore's Law" paper that it might become more cost-effective to construct extensive systems using smaller, individually…”
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Conference Proceeding -
3
Designing and building application‐centric parallel memories
Published in Concurrency and computation (10-08-2020)“…Summary Memory bandwidth is a critical performance factor for many applications and architectures. Intuitively, a parallel memory could be a good solution for…”
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Journal Article -
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The Case for Polymorphic Registers in Dataflow Computing
Published in International journal of parallel programming (01-12-2018)“…Heterogeneous systems are becoming increasingly popular, delivering high performance through hardware specialization. However, sequential data accesses may…”
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Journal Article -
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Systolic Array Matrix Multiplication Accelerator
Published in 2024 International Semiconductor Conference (CAS) (09-10-2024)“…Systolic arrays are a simple solution to accelerate matrix multiplication. Matrix multiplication is a common operation used in artificial intelligence. We…”
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Conference Proceeding -
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A NoC-based custom FPGA configuration memory architecture for ultra-fast micro-reconfiguration
Published in 2017 International Conference on Field Programmable Technology (ICFPT) (01-12-2017)“…Run-time reconfiguration in FPGAs is an important feature that offers design flexibility under low-cost silicon area and power budgets, at the cost of…”
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Conference Proceeding -
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EXTRA: Towards an Efficient Open Platform for Reconfigurable High Performance Computing
Published in 2015 IEEE 18th International Conference on Computational Science and Engineering (01-10-2015)“…To handle the stringent performance requirements of future exascale-class applications, High Performance Computing (HPC) systems need ultra-efficient…”
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Conference Proceeding -
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An open reconfigurable research platform as stepping stone to exascale high-performance computing
Published in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 (01-03-2017)“…To handle the stringent performance and power requirements of future exascale-class applications, High Performance Computing (HPC) systems need ultra-efficient…”
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Conference Proceeding -
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MAX-PolyMem: High-Bandwidth Polymorphic Parallel Memories for DFEs
Published in 2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) (01-05-2018)“…Memory bandwidth is critical for many modern applications and architectures. Parallel memories should alleviate this problem, but they are difficult to design…”
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Conference Proceeding -
10
On Parallelizing Geometrical PCA Approximation
Published in 2019 18th RoEduNet Conference: Networking in Education and Research (RoEduNet) (01-10-2019)“…Remote sensing data has known an explosive growth in the past decade. This has led to the need for efficient dimensionality reduction techniques, mathematical…”
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Conference Proceeding -
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EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures
Published in 2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) (01-06-2016)“…To handle the stringent performance requirements of future exascale-class applications, High Performance Computing (HPC) systems need ultra-efficient…”
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Conference Proceeding