Search Results - "Chyn, Ng Yong"

Identify critical packaging parameters impacting wafer warpage using FEA and statistical analysis techniques by Lin, Ji, Chyn, Ng Yong

“…Wafer warpage behaviors that result from thermal expansion coefficient (CTE) mismatch during packaging processes are usually complicated due to the interactive…”
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Parasitic Surface Conduction Effect of TSV on Interconnection Performance in RF SOI for 2.5D Integration by Lin, Zhou, Guan, Lim Teck, Jiaqi, Wu, Feng, Xu, Chinq, Jong Ming, Chyn, Ng Yong

“…Silicon interposer is being widely used for 2.5D integration due to its advanced performance. However, the resistivity of the silicon can be impacted by the…”
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Investigation of SnAg Superconductivity as Solder Material for Cryogenic Packaging by Ng, Yong Chyn, Li, Hongyu, Jaafar, Norhanani Binte, Cheow Siong Lee, Rainer, Huang, Ding, Lau, Chit Siong, Eng Johnson Goh, Kuan, Chui, King-Jien

“…The drive towards quantum computing has prompted a need for advanced packaging technologies capable of withstanding the harsh cryogenic environments in which…”
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Indium-based Flip-chip Interconnect for Cryogenic Packaging by Jaafar, Norhanani Binte, Hongyu, Li, Choong, Chong Ser, Yong Chyn, Ng, Huang, Ding, Lau, Chit Siong, Goh, Kuan Eng Johnson, Chui, King-Jien

“…Flip-chip die attachment manufacturing has seen a dramatic increase in recent years due to improvements in electrical performance and reduced form-factor…”
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Design and Fabrication of 2.5D Cryogenic Interposer With Integrated Superconducting TSVs and Resonators by Li, HongYu, Chui, King-Jien, Kiat Goh, Simon Chun, Perdana Budoyo, Rangga, Long, Nguyen Hoang, Chyn Ng, Yong, Lau, Daniel, Jaafar, B. N., Paul Tan, Yuanzheng, Dumke, Rainer

“…A transmission line with TSVs was fabricated and characterized at room temperature and 10 mK. The extracted average loss per TSV is ~ 0.4 dB at 10mK within 4-6…”
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Demonstration of a CMOS-Compatible Superconducting Cryogenic Interposer for Advanced Quantum Processors by Chui, King-Jien, Li, Hongyu, Ng, Yong Chyn, Lau, Chit Siong, Goh, K. E. J., Huang, D., Tseng, Ya-Ching, Chen, J. K., Yu, H., Jaafar, B. N., Lin, H., Varghese, B.

“…An advanced quantum processor requires millions of qubits but is at present limited in scalability due to limitations in the wiring of qubits. A 2.5D silicon…”
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High-Performance Amplifier Package Design for Heterogenous Integration on Si-interposer by Lim, Teck Guan, Zho, Lin, Tippabhotla, Sasi Kumar, Lin, Ji, Chinq, Jong Ming, Wu, JiaQi, Gongyue, Tang, Ching, Eva Wai Leong, Ng, Yong Chyn, Chui, King Jien, Lu, Wei Jia, Goh, Chee Heng, Lin Pek, Sek, Loh, Jun Wei Agnes

“…The RF design for the wire bond and flip-chip Power Amplifier (PA) MMIC on the High Resistivity (HiR) Si-interposer are presented in this paper. The HiR…”
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Automated Analysis of AFM Data of High-Density Cu Pad for Fine Pitch Wafer-to-Wafer (W2W) and Chip-to-Wafer (C2W) Hybrid Bonding by Chen, Jiakai, Ng, Yong Chyn, Mishra, Dileep K., Chui, K. J.

“…With the advancement of 3D packaging, hybrid bonding is the most widely explored technology for heterogeneous integration and stacking of dies. For the hybrid…”
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