Search Results - "Cho, Jeonghyeon"
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High-Frequency Scalable Electrical Model and Analysis of a Through Silicon Via (TSV)
Published in IEEE transactions on components, packaging, and manufacturing technology (2011) (01-02-2011)“…We propose a high-frequency scalable electrical model of a through silicon via (TSV). The proposed model includes not only the TSV, but also the bump and the…”
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Journal Article -
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The Impact of Patient Education with a Smartphone Application on the Quality of Bowel Preparation for Screening Colonoscopy
Published in Clinical endoscopy (01-09-2017)“…Few studies have evaluated the use of a smartphone application (app) for educating people undergoing colonoscopy and optimizing bowel preparation. Therefore,…”
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A Wide-Band Passive Equalizer Design on PCB Based on Near-End Crosstalk and Reflections for 12.5 Gbps Serial Data Transmission
Published in IEEE microwave and wireless components letters (01-12-2008)“…We propose a wide-band passive equalization method for high-speed serial chip-to-chip input/output channels using wave propagation, reflection, and coupling…”
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A Compact and Wide-Band Passive Equalizer Design Using a Stub With Defected Ground Structure for High Speed Data Transmission
Published in IEEE microwave and wireless components letters (01-05-2010)“…A compact wide-band passive equalization design using a stub with defected ground structure is proposed. The proposed design, based on reflections under a slow…”
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Mixed-Mode ABCD Parameters: Theory and Application to Signal Integrity Analysis of PCB-Level Differential Interconnects
Published in IEEE transactions on electromagnetic compatibility (01-08-2011)“…The mixed-mode ABCD parameters are newly introduced and developed, where the definition and the connection are carefully established to have both the…”
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Modeling and Design Optimization of a Wideband Passive Equalizer on PCB Based on Near-End Crosstalk and Reflections for High-Speed Serial Data Transmission
Published in IEEE transactions on electromagnetic compatibility (01-05-2010)“…We propose a closed-form analytic model for the newly presented passive equalizer using near-end crosstalk and reflections on printed circuit board (PCB). The…”
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SMT: Software-Defined Memory Tiering for Heterogeneous Computing Systems With CXL Memory Expander
Published in IEEE MICRO (01-03-2023)“…The rapid development of data-intensive technologies has driven an increasing demand for new architectural solutions with scalable, composable, and coherent…”
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Near-Memory Processing in Action: Accelerating Personalized Recommendation With AxDIMM
Published in IEEE MICRO (01-01-2022)“…Near-memory processing (NMP) is a prospective paradigm enabling memory-centric computing. By moving the compute capability next to the main memory (DRAM…”
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Causality Enforcement in Transient Simulation of HDMI Interconnects with Magnitude Equalization
Published in 2007 IEEE International Symposium on Electromagnetic Compatibility (01-07-2007)“…An intuitive causality enforcement method is presented for the successful transient simulation of high-definition multimedia interface (HDMI) interconnects…”
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Conference Proceeding
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Aquabolt-XL HBM2-PIM, LPDDR5-PIM With In-Memory Processing, and AXDIMM With Acceleration Buffer
Published in IEEE MICRO (01-05-2022)“…Processing-in-memory (PIM) has been proposed to improve the performance of bandwidth-intensive workloads as well as save energy due to reduced compute-memory…”
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The Breakthrough Memory Solutions for Improved Performance on LLM Inference
Published in IEEE MICRO (01-05-2024)“…Large language models (LLMs) have changed our lives, but they require unprecedented computing resources—especially large memory capacity and high bandwidth to…”
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An LPDDR-based CXL-PNM Platform for TCO-efficient Inference of Transformer-based Large Language Models
Published in 2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA) (02-03-2024)“…Transformer-based large language models (LLMs) such as Generative Pre-trained Transformer (GPT) have become popular due to their remarkable performance across…”
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Conference Proceeding -
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Through silicon via (TSV) equalizer
Published in 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems (01-10-2009)“…Through silicon via (TSV) is a promising vertical interconnection method to achieve a 3-dimensional integrated circuit (3D IC) system. However, high-speed…”
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Conference Proceeding -
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A compact, low-cost, and wide-band passive equalizer design using multi-layer PCB parasitics
Published in 19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems (01-10-2010)“…In this work, we developed a sophisticated low-cost and wide-band passive equalization method for high-speed differential interconnects. The proposed method…”
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Conference Proceeding -
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A designated clock generation and distribution (DCGD) chip scheme for substrate noise-free 3-D stacked SiP design
Published in 2010 Asia-Pacific International Symposium on Electromagnetic Compatibility (01-04-2010)“…In this paper, we propose a new designated clock generation and distribution (DCGD) chip scheme to offer extremely low jitter clock delivery. The proposed…”
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Conference Proceeding -
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Hybrid equalizer design for 12.5 Gbps serial data transmission
Published in 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems (01-10-2009)“…High-speed digital signals suffer from frequency-dependent losses on channels with degraded timing and voltage margin at the receiver. A hybrid equalization…”
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Conference Proceeding -
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A precise analytical eye-diagram estimation method for non-ideal high-speed channels
Published in 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems (01-10-2009)“…In this paper, we propose an analytical eye-diagram estimation method for a channel of a pair of differential microstrip traces on PCBs with arbitrary source…”
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Conference Proceeding -
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A fast and precise eye-diagram estimation method for a channel of a pair of differential microstrip lines on PCB with arbitrary terminations
Published in 2009 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS) (01-12-2009)“…In this paper, we propose a fast and precise eye-diagram estimation method for a channel of a pair of differential microstrip lines on PCBs with arbitrary…”
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Conference Proceeding -
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Analysis of power/ground noise effect on performance degradation of analog-to-digital converter
Published in 2009 11th Electronics Packaging Technology Conference (01-12-2009)“…This paper presents the analysis of the effect of power/ground noise on analog-to-digital converter (ADC). Power/ground noise is one of the noise sources to…”
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Conference Proceeding -
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An adaptive on-chip ESR controller scheme in power distribution network for simultaneous switching noise reduction
Published in 2008 IEEE-EPEP Electrical Performance of Electronic Packaging (01-10-2008)“…In this paper, we propose an adaptive on-chip equivalent series resistor (ESR) controller scheme to reduce on-chip simultaneous switching noise (SSN). The…”
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Conference Proceeding