Search Results - "Chih-Hou Tsai"
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20.2 A 40MHz-BW 320MS/s Passive Noise-Shaping SAR ADC With Passive Signal-Residue Summation in 14nm FinFET
Published in 2019 IEEE International Solid- State Circuits Conference - (ISSCC) (01-02-2019)“…SAR ADCs are popular in mobile WiFi applications due to their low power and small area. SNR of 60-70dB is necessary to meet the noise budget for the downlink…”
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Conference Proceeding -
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A 2×2 MIMO 802.11 abgn/ac WLAN SoC with integrated T/R switch and on-chip PA delivering VHT80 256QAM 17.5dBm in 55nm CMOS
Published in 2014 IEEE Radio Frequency Integrated Circuits Symposium (01-06-2014)“…This paper describes 2×2 MIMO 802.11ac Stage 1 WiFi + BT combo SoC chip with integrated dual-band PAs, LNAs, T/R switches, as well as a power management unit…”
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Conference Proceeding -
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A 8.2-mW 10-b 1.6-GS/s 4× TI SAR ADC with fast reference charge neutralization and background timing-skew calibration in 16-nm CMOS
Published in 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits) (01-06-2016)“…This paper presents a 4-way 1.6-GS/s time-interleaved (TI) SAR ADC with fast reference charge neutralization (CN) and background timing-skew calibration. The…”
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Conference Proceeding -
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A 2.4-mW 25-MHz BW 300-MS/s passive noise shaping SAR ADC with noise quantizer technique in 14-nm CMOS
Published in 2017 Symposium on VLSI Circuits (01-06-2017)“…This paper presents a SAR ADC using passive noise shaping and noise quantizer techniques. A ping-pong residue switching enables noise shaping at high sampling…”
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Conference Proceeding -
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27.5 An 80MHz-BW 640MS/s Time-Interleaved Passive Noise-Shaping SAR ADC in 22nm FDSOI Process
Published in 2021 IEEE International Solid- State Circuits Conference (ISSCC) (13-02-2021)“…Recently, both the number of smart devices and the amount of data transfered to and from these devices have grown at unprecedented rates. To provide users with…”
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Conference Proceeding