Search Results - "Chevobbe, S."

Scheduling, binding and routing system for a run-time reconfigurable operator based multimedia architecture by Raffin, E, Wolinski, C, Charot, F, Kuchcinski, K, Guyetant, S, Chevobbe, S, Casseau, E

“…This paper presents a system for application scheduling, binding and routing for a run-time reconfigurable operator based multimedia architecture (ROMA). We…”
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A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing by Millet, L., Chevobbe, S., Andriamisaina, C., Beigne, E., Guellec, F., Dombek, T., Benaissa, L., Deschaseaux, E., Duranton, M., Benchehida, K., Darouich, M., Lepecq, M.

“…This paper presents a 2-layer 3D stacked Back Side Illuminated vision chip performing high speed programmable parallel computing by exploiting in-focal-plane…”
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Next generation image sensor via direct hybrid bonding by Benaissa, L., Di Cioccio, L., Beilliard, Y., Coudrain, P., Dominguez, S., Balan, V., Enot, T., Imbert, B., Millet, L., Chevobbe, S.

“…We report wafer level assembly of an advanced image sensor with control logic units and memories. The stack includes all back-end levels of a 0.13μm double…”
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SNet, a novel network for manycore architectures by Azar, Celine, Chevobbe, Stephane, Lhuillier, Yves, Diguet, Jean-Philippe

“…Embedded platforms are expected to integrate thousands of cores in the near future, and one of the major difficulties remains in scaling the interconnection…”
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A small footprint interleaved multithreaded processor for embedded systems by Bechara, C., Berhault, A., Ventroux, N., Chevobbe, S., Lhuillier, Y., David, R., Etiemble, D.

“…With the increase in the design complexity of MPSoC architectures and the need for more transistor/energy efficient processor architectures, designers are…”
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Reconfiguration Level Analysis of FFT / FIR Units in Wireless Telecommunication Systems by Ojail, M., David, R., Chevobbe, S., Demigny, D.

“…Wireless communications domain have been evolving in a fast way in the past years in order to support new services for users. This evolution led to the…”
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Dynamic routing strategy for embedded distributed architectures by Azar, C., Chevobbe, S., Lhuillier, Y., Diguet, Jean-Philippe

“…The number of processors integrated in embedded platforms is expected to grow and reach thousands of cores in the near future. Manycore architectures gained a…”
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Exploration platform of embedded simd architecture for autonomous retinas by Chevobbe, S, Pajaniradja, S, Letellier, L

“…An integrated smart camera is a single chip composed of a sensor tightly coupled with one or more processing elements. The image processing applications that…”
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A reconfigurable FIR/FFT unit for wireless telecommunication systems by Ojail, M., David, R., Chevobbe, S., Demigny, D.

“…Wireless communications have been evolving in the past years in a fast way that led to the apparition of numerous standards like UMTS (3G), IEEE 802.11 (WLAN)…”
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A Frequency Domain FIR Filter Implementation Method for 3G Communication Systems by Ojail, M., Chevobbe, S., David, R., Demigny, D.

“…Wireless communications have been evolving in the past years in a fast way that led to the apparition of numerous standards like UMTS (3G), IEEE 802.11 (WLAN)…”
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A multi-core signal processor for heterogeneous reconfigurable computing by Rossi, D., Campi, F., Deledda, A., Mucci, C., Pucillo, S., Whitty, S., Ernst, R., Chevobbe, S., Guyetant, S., Kuhnle, M., Hubner, M., Becker, J., Putzke-Roeming, W.

“…Reconfigurable computing holds the promise of delivering ASIC-like performance while preserving run-time flexibility of processors. In many application…”
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