Search Results - "Cheung, Peter Y.K."

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  1. 1

    Performance Comparison of Graphics Processors to Reconfigurable Logic: A Case Study by Cope, B., Cheung, P.Y.K., Luk, W., Howes, L.

    Published in IEEE transactions on computers (01-04-2010)
    “…A systematic approach to the comparison of the graphics processor (GPU) and reconfigurable logic is defined in terms of three throughput drivers. The approach…”
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    Journal Article
  2. 2

    Post-lockdown abatement of COVID-19 by fast periodic switching by Bin, Michelangelo, Cheung, Peter Y K, Crisostomi, Emanuele, Ferraro, Pietro, Lhachemi, Hugo, Murray-Smith, Roderick, Myant, Connor, Parisini, Thomas, Shorten, Robert, Stein, Sebastian, Stone, Lewi

    Published in PLoS computational biology (21-01-2021)
    “…COVID-19 abatement strategies have risks and uncertainties which could lead to repeating waves of infection. We show-as proof of concept grounded on rigorous…”
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    Journal Article
  3. 3

    LUTNet: Learning FPGA Configurations for Highly Efficient Neural Network Inference by Wang, Erwei, Davis, James J., Cheung, Peter Y. K., Constantinides, George A.

    Published in IEEE transactions on computers (01-12-2020)
    “…Research has shown that deep neural networks contain significant redundancy, and thus that high classification accuracy can be achieved even when weights and…”
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    Journal Article
  4. 4

    A Novel Video Parsing Algorithm Utilizing the Pleasure-Arousal-Dominance Emotional Information by Arifin, S., Cheung, P.Y.K.

    “…One of the major problems faced when designing a high level video parsing system is that viewers usually have doubts about the exact boundaries of an episode…”
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    Conference Proceeding
  5. 5

    Verification and Fault Injection Platform Based on MTB Stimulus Generation Method for L2 Deep Market Quote Decoder by Yu, Le, Liang, Zhiheng, Li, Yaqi, Zhang, Shiwei, Zhao, Yiren, Cheung, Peter Y. K.

    Published in IEEE access (2024)
    “…With the rapid advancement of quantitative trading technology, the demand for low-latency in Level 2 Deep Market Quote (L2DMQ) Decoding is ever-increasing. The…”
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    Journal Article
  6. 6

    KAPow: A System Identification Approach to Online Per-Module Power Estimation in FPGA Designs by Hung, Eddie, Davis, James J., Levine, Joshua M., Stott, Edward A., Cheung, Peter Y. K., Constantinides, George A.

    “…In a modern FPGA system-on-chip design, it is often insufficient to simply assess the total power consumption of the entire circuit by design-time estimation…”
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    Conference Proceeding
  7. 7

    Enhancing Relocatability of Partial Bitstreams for Run-Time Reconfiguration by Becker, T., Luk, W., Cheung, P.Y.K.

    “…This paper introduces a method that enhances the relocatability of partial bitstreams for FPGA run-time reconfiguration. Reconfigurable applications usually…”
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    Conference Proceeding
  8. 8

    Context-based image acquisition from memory in digital systems by Liu, Jianxiong, Bouganis, Christos, Cheung, Peter Y. K.

    Published in Journal of real-time image processing (01-08-2019)
    “…A key consideration in the design of image and video processing systems is the ever increasing spatial resolution of the captured images, which has a major…”
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    Journal Article
  9. 9

    Adaptive Routing in Network-on-Chips Using a Dynamic-Programming Network by Mak, T., Cheung, P. Y. K., Kai-Pui Lam, Luk, W.

    “…Dynamic routing is desirable because of its substantial improvement in communication bandwidth and intelligent adaptation to faulty links and congested…”
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    Journal Article
  10. 10

    CypherDB: A Novel Architecture for Outsourcing Secure Database Processing by Chen, Bony H.K., Cheung, Paul Y.S., Cheung, Peter Y.K., Kwok, Yu-Kwong

    Published in IEEE transactions on cloud computing (01-04-2018)
    “…CypherDB addresses the problem of protecting the confidentiality of database stored externally in a cloud and enabling efficient computation over it to thwart…”
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    Journal Article
  11. 11

    High-level power and performance estimation of FPGA-based soft processors and its application to design space exploration by Powell, Adam, Savvas-Bouganis, Christos, Cheung, Peter Y.K.

    Published in Journal of systems architecture (01-11-2013)
    “…This paper presents a design space exploration framework for an FPGA-based soft processor that is built on the estimation of power and performance metrics…”
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    Journal Article
  12. 12

    Image progressive acquisition for hardware systems by Liu, Jianxiong, Bouganis, Christos, Cheung, Peter Y.K.

    “…As the resolution of digital images increases, accessing raw image data from memory has become a major consideration during the design of image/video…”
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    Conference Proceeding
  13. 13

    Affective Level Video Segmentation by Utilizing the Pleasure-Arousal-Dominance Information by Arifin, S., Cheung, P.

    Published in IEEE transactions on multimedia (01-11-2008)
    “…In this paper, we offer an entirely new view to the problem of high level video parsing. We developed a novel computation method for affective level video…”
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    Journal Article
  14. 14

    Timing Measurement Platform for Arbitrary Black-Box Circuits Based on Transition Probability by Wong, Justin S. J., Cheung, Peter Y. K.

    “…The key aspects of a good on-chip timing measurement platform are high measurement resolution, accuracy, and low area overhead. A measurement method based on…”
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    Journal Article
  15. 15

    Wordlength optimization for linear digital signal processing by Constantinides, G.A., Cheung, P.Y.K., Luk, W.

    “…This paper presents an approach to the wordlength allocation and optimization problem for linear digital signal processing systems implemented as custom…”
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    Journal Article
  16. 16

    FPGA Architecture Optimization Using Geometric Programming by Smith, Alastair M, Constantinides, George A, Cheung, Peter Y K

    “…This paper is concerned with the application of geometric programming to the design of homogeneous field programmable gate array (FPGA) architectures. The…”
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    Journal Article
  17. 17

    Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted Hardware Compilation: A Geometric Programming Framework by Qiang Liu, Constantinides, G.A., Masselos, K., Cheung, P.

    “…A nonlinear optimization framework is proposed in this paper to automate exploration of the design space consisting of data-reuse (buffering) decisions and…”
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    Journal Article
  18. 18

    Customizable elliptic curve cryptosystems by Cheung, R.C.C., Telle, N.J., Luk, W., Cheung, P.Y.K.

    “…This paper presents a method for producing hardware designs for elliptic curve cryptography (ECC) systems over the finite field GF(2/sup m/), using the optimal…”
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    Journal Article
  19. 19

    Implementation and Comparison of the 5/3 Lifting 2D Discrete Wavelet Transform Computation Schedules on FPGAs by Angelopoulou, Maria E., Masselos, Konstantinos, Cheung, Peter Y. K., Andreopoulos, Yiannis

    Published in Journal of signal processing systems (01-04-2008)
    “…The suitability of the 2D Discrete Wavelet Transform (DWT) as a tool in image and video compression is nowadays indisputable. For the execution of the…”
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    Journal Article
  20. 20

    LUTNet: Rethinking Inference in FPGA Soft Logic by Wang, Erwei, Davis, James J., Cheung, Peter Y. K., Constantinides, George A.

    “…Research has shown that deep neural networks contain significant redundancy, and that high classification accuracies can be achieved even when weights and…”
    Get full text
    Conference Proceeding