Search Results - "Chao-Hsin Chien"

Conformal bilayer h-AlN epitaxy on WS2 by ALD with ultralow leakage current by Wang, Shin-Yuan, Chang, Shu-Jui, Huang, Yu-Che, Chih, Jia Hao, Lin, Yu-Chin, Cheng, Chao-Ching, Radu, Iuliana, Hu, Chenming, Chien, Chao-Hsin

“…In this work, we develop an ultrathin epitaxial h-AlN as an interfacial layer (IL) between HfO2 and monolayer WS2 channel by atomic layer deposition (ALD). The…”
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Wafer-scale MOCVD grown WS2 with normally off transistor behavior and its general application on different amorphous substrates by Wu, Wen-Chia, Huang, Kuan-Ning, Su, Chien-Ying, Kei, Chi-Chung, Kuo, Cheng Huang, Chien, Chao-Hsin

“…In this study, we investigated various approaches to manipulate the flake density, size, and thickness of two-dimensional transition metal dichalcogenides by…”
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Effect of Yttrium Treatment on Germanium-Oxide-Based Interfacial Layer of Ge P-Channel Metal-Oxide-Semiconductor Field-Effect Transistor Fabricated Through in Situ Plasma-Enhanced Atomic Layer Deposition by Li, Hui-Hsuan, Lin, Kuan-Yu, Tsai, Yi-He, Lin, Yu-Hsien, Chien, Chao-Hsin

“…This study investigated the effect of yttrium (Y) treatment on a germanium (Ge)-oxide-based interfacial layer (IL) through in situ plasma-enhanced atomic layer…”
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van der Waals epitaxy of 2D h-AlN on TMDs by atomic layer deposition at 250 °C by Chang, Shu-Jui, Wang, Shin-Yuan, Huang, Yu-Che, Chih, Jia Hao, Lai, Yu-Ting, Tsai, Yi-Wei, Lin, Jhih-Min, Chien, Chao-Hsin, Tang, Ying-Tsan, Hu, Chenming

“…We report the demonstration of growing two-dimensional (2D) hexagonal-AlN (h-AlN) on transition metal dichalcogenide (TMD) monolayers (MoS2, WS2, and WSe2) via…”
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Improving Thermal Stability for Ge p-MOSFET of HfO2-Based Gate Stack With Ti-Doped Into Interfacial Layer by In-Situ Plasma-Enhanced Atomic Layer Deposition by Li, Hui-Hsuan, Tsai, Yi-He, Lin, Yu-Hsien, Chien, Chao-Hsin

“…We successfully fabricated a Ge pMOSFET with Ti that is doped into a GeO x interfacial layer (IL) of HfO 2 -based gate stacks, doing so using in situ…”
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GaN-based mini-LED matrix applied to multi-functional forward lighting by Nguyen, Quang-Khoi, Lin, Yi-Jou, Sun, Ching, Lee, Xuan-Hao, Lin, Shih-Kang, Wu, Chi-Shou, Yang, Tsung-Hsun, Wu, Tian-Li, Lee, Tsung-Xian, Chien, Chao-Hsin, Yu, Yeh-Wei, Sun, Ching-Cherng

“…In this paper, we propose and demonstrate to use of a single reflector with 68 segments to project vehicle low beam and high beam with the use of a GaN-based…”
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Impact of High-Temperature Annealing on Interfacial Layers Grown by O2 Plasma on Si0.5Ge0.5 Substrates by Lee, Meng-Chien, Lin, Hung-Ru, Lee, Wei-Li, Chung, Nien-Ju, Luo, Guang-Li, Chien, Chao-Hsin

“…This article demonstrates the influence of high-temperature annealing on an interfacial layer (IL) grown by O 2 plasma on Si 0.5 Ge 0.5 substrates. The X-ray…”
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Comprehensive Study of Contact Length Scaling Down to 12 nm With Monolayer MoS2 Channel Transistors by Wu, Wen-Chia, Hung, Terry Y. T., Sathaiya, D. Mahaveer, Arutchelvan, Goutham, Hsu, Chen-Feng, Su, Sheng-Kai, Chou, Ang Sheng, Chen, Edward, Shen, Yun-Yang, Liew, San Lin, Hou, Vincent, Lee, T. Y., Cai, Jin, Wu, Chung-Cheng, Wu, Jeff, Wong, H.-S. Philip, Cheng, Chao-Ching, Chang, Wen-Hao, Radu, Iuliana P., Chien, Chao-Hsin

“…The 2-D transition metal dichalcogenides (2-D TMDs) have emerged as a promising channel material for postsilicon applications for their ultrathin structure and…”
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Enhancing the Thermal Stability of GaSb Schottky-Barrier MOSFET With Pt Source/Drain by Tsai, Ming-Li, Chang, Yun-Pin, Chien, Chao-Hsin

“…In this study, a Pt/GaSb Schottky diode with impressive rectifying behavior is used for the first time in the fabrication of a GaSb p-channel Schottky-barrier…”
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Neuro-Inspired-in-Memory Computing Using Charge-Trapping MemTransistor on Germanium as Synaptic Device by Chou, Yu-Che, Tsai, Chien-Wei, Yi, Chin-Ya, Chung, Wan-Hsuan, Wang, Shin-Yuan, Chien, Chao-Hsin

“…In this work, we fabricated charge-trapping MemTransistors (CTMTs) on a germanium (Ge) substrate with a single-charge-trapping-layer gate-stack or a…”
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Experimentally Determining the Top and Edge Contact Resistivities of Two-Step Sulfurization Nb-Doped MoS2 Films Using the Transmission Line Measurement by Chung, Yun-Yan, Li, Chi-Feng, Lin, Chao-Ting, Ho, Yen-Teng, Chien, Chao-Hsin

“…This study determined the top (vertical) and edge (horizontal) resistivities of metal-MoS 2 contact based on the experimental results obtained using the…”
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Highly Transparent, High-Performance IGZO-TFTs Using the Selective Formation of IGZO Source and Drain Electrodes by WU, Hung-Chi, CHIEN, Chao-Hsin

“…In this letter, high-performance, highly transparent amorphous InGaZnO (IGZO) thin-film transistors (TFTs) with IGZO source/drain electrodes were fabricated…”
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Improving Interface State Density and Thermal Stability of High- \kappa Gate Stack Through High-Vacuum Annealing on Si0.5Ge0.5 by Lee, Wei-Li, Yu, Cheng-Yu, Zhang, Jun-Lin, Luo, Guang-Li, Chien, Chao-Hsin

“…We fabricated HfO 2 -based gate stacks on epi-Si 0.5 Ge 0.5 substrates and investigated the effect of thermal treatment on their structural and electrical…”
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Effect of Oxygen Treatment on the Electrical Performance and Reliability of IWO Thin-Film Transistors by Chen, Yi-Xuan, Wang, Yi-Lin, Li, Fu-Jyuan, Chang, Shu-Jui, Lee, Tsung-En, Cheng, Chao-Ching, Lee, Meng-Chien, Li, Hui-Hsuan, Lin, Yu-Hsien, Chien, Chao-Hsin

“…In this work, we systematically investigated the effect of oxygen treatment on the material and electrical properties of Indium-Tungsten-Oxide thin film…”
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Sinter-free transferring of anodized TiO2 nanotube-array onto a flexible and transparent sheet for dye-sensitized solar cells by Kuo, Yu-Yen, Chien, Chao-Hsin

“…[Display omitted] ► A sinter-free method to transfer TiO2 nanotube onto plastic sheet was proposed. ► Transparent conductive oxide on nanotubes exhibited…”
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Demonstration of HfO2-Based Gate Dielectric With Low Interface State Density and Sub-nm EOT on Ge by Incorporating Ti Into Interfacial Layer by Tsai, Yi-He, Chou, Chen-Han, Chung, Yun-Yan, Yeh, Wen-Kuan, Lin, Yu-Hsien, Ko, Fu-Hsiang, Chien, Chao-Hsin

“…HfO 2 -based gate stacks with titanium (Ti) incorporated into a GeO x interfacial layer (IL) were fabricated on p-Ge substrates. X-ray photoelectron…”
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Self‐Aligned Contact Doping for Performance Enhancement of Low‐Leakage Carbon Nanotube Field Effect Transistors by Chiu, Hsin‐Yuan, Chao, Tzu‐Ang, Safron, Nathaniel S., Su, Sheng‐Kai, Liew, San‐Lin, Yun, Wei‐Sheng, Mao, Po‐Sen, Lin, Yu‐Tung, Hou, Vincent Duen‐Huei, Lee, Tung‐Ying, Chang, Wen‐Hao, Passlack, Matthias, Wong, Hon‐Sum Philip, Radu, Iuliana P., Wang, Han, Pitner, Gregory, Chien, Chao‐Hsin

“…Carbon nanotube (CNT) field effect transistors (CNFETs) show promise for the next generation VLSI systems due to their excellent scalability, energy…”
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Low-Leakage Tetragonal ZrO2 (EOT < 1 nm) With In Situ Plasma Interfacial Passivation on Germanium by Chen-Han, Chou, Hao-Hsuan Chang, Chung-Chun, Hsu, Wen-Kuan Yeh, Chao-Hsin Chien

“…We successfully fabricated gate stacks (ZrO2/GeO x /Ge) with a subnanometer equivalent oxide thickness (EOT) and low-leakage current on n-/p-Ge through…”
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Interface Characterization of HfO2/GaSb MOS Capacitors With Ultrathin Equivalent Oxide Thickness by Using Hydrogen Plasma Treatment by Ming-Li Tsai, Jun-Yu Ko, Shin-Yuan Wang, Chao-Hsin Chien

“…We investigate p-type GaSb MOS capacitors with various HfO 2 thicknesses grown using an atomic layer deposition. GaSb surfaces treated with ex-situ chemical…”
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First Experimental Demonstration and Mechanism of Abnormal Palladium Diffusion Induced by Excess Interstitial Ge by Chou, Chen-Han, Shih, An-Shih, Yu, Shao-Cheng, Lin, Yu-Hsi, Tsai, Yi-He, Lin, Chiung-Yuan, Yeh, Wen-Kuan, Chien, Chao-Hsin

“…This letter represents the first direct experimental demonstrations and mechanism proposal regarding abnormal palladium diffusion into germanium (Ge). Our…”
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