Search Results - "Chai, K. T. C."

A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP by Wong, M. M., Shrestha, S. B., Nambiar, V. P., Mani, A., Lee, Y. K., Koh, E. K., Jiang, W., Chai, K. T. C., Do, A. T.

“…This work introduces a neuromorphic chip featuring energy-efficient transfer learning capability using a new learning rule, Delta- Spike Time Dependent…”
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A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP by Wong, M. M., Shrestha, S. B., Nambiar, V. P., Mani, A., Lee, Y. K., Koh, E. K., Jiang, W., Chai, K. T. C., Do, A. T.

“…This work introduces a neuromorphic chip featuring energy-efficient transfer learning capability using a new learning rule, Delta- Spike Time Dependent…”
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Electrical impedance tomography for sensing with integrated microelectrodes on a CMOS microchip by Chai, K.T.C., Davies, J.H., Cumming, D.R.S.

“…Electrical impedance tomography (EIT) is an imaging method that is capable of reconstructing the three-dimensional (3D) internal conductivity distribution of a…”
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Ultrasonic Wavefront Computing Architecture on CMOS for Fourier Transform Computation by Wang, Y. S., Chai, K. T. C., Chen, D. S. H., Wai, E. L. C., Sharma, J., Phuong, B. V., Png, C. E., Lal, A.

“…Fourier transform (FT) is an analytical algorithm that is ubiquitous with wide application uses from signal/image processing to solving differential equations…”
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Linearity Characterization of Hybrid Driving Scheme for Spatial Light Modulator System by Di, Z., Mani, A., Do, A. T., Baranikov, A., Veetil, R. M., Dominguez, R.P., Kuznetsov, A. I., Chai, K. T. C.

“…This paper proposes a low-voltage pulse-code digital control scheme for Spatial Light Modulator (SLM). To avoid high voltage swing across the liquid crystal,…”
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1V, 1.13μm pixel pitch Liquid Crystal Driver with Charge-Balancing Scheme for SLM Applications by Mani, A., Sheng, C.Y., Zhu, D., Veetil, R.M., Parikshit, M., Mass, T.W.W., Choong, C.S., Xuewu, X., Dominguez, R.P., Kuznetsov, A.I., Krishna, P., Keyi, P., Chai, K.T.C., Do, A.T.

“…This work proposes a compact 9T SRAM-based pixel design for low-voltage and high-speed modulator for spatially varying modulation of light (i.e. SLM). To…”
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Modification of a CMOS microelectrode array for a bioimpedance imaging system by Chai, Kevin T.C., Hammond, P.A., Cumming, D.R.S.

“…A complete microsensor array with integrated circuitry, fabricated using a conventional complementary metal oxide semiconductor (CMOS) process is presented…”
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High temperature bandgap reference in PDSOI CMOS with operating temperature up to 300°C by Pathrose, J., Xiaohui Gong, Lei Zou, Jeongwook Koh, Chai, K. T. C., Minkyu Je, Yong Ping Xu

“…This paper describes a bandgap reference with temperature range up to 300°C. Fabricated in a PDSOI CMOS technology, the bandgap reference achieves a box model…”
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A 64-channel readout ASIC for nanowire biosensor array with electrical calibration scheme by Chai, K T C, Choe, K, Bernal, O D, Gopalakrishnan, P K, Guo-Jun Zhang, Tae Goo Kang, Minkyu Je

“…A 1.8-mW, 18.5-mm 2 64-channel current readout ASIC was implemented in 0.18-μm CMOS together with a new calibration scheme for silicon nanowire biosensor…”
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