Substrate Silicon Wafer Integrated Fan-out Technology (S-SWIFT®) Packaging with Fine Pitch Embedded Trace RDL

This paper presents an advanced redistribution layer (RDL) technology called embedded trace RDL (ETR) for use in the substrate Silicon Wafer Integrated Fan-out Technology (S-SWIFT ® ) package. S-SWIFT packaging is designed to provide increased input/output (I/O) and circuit density within a reduced...

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Bibliographic Details
Published in:	2022 IEEE 72nd Electronic Components and Technology Conference (ECTC) pp. 1355 - 1361
Main Authors:	Jin, SangHyun, Do, WonChul, Jeong, JinSuk, Cha, HyunGoo, Jeong, YunKyung, Khim, JinYoung
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01-05-2022
Subjects:	Coatings Dual damascene Embedded trace RDL (ETR) Fine-pitch redistribution layer (RDL) High-Density Fan-Out (HDFO) Lithography Packaging Photolithography Semiconductor device reliability Silicon Silicon Wafer Integrated Fan-out Technology (SWIFT ® ) Stacking Substrates
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Summary:	This paper presents an advanced redistribution layer (RDL) technology called embedded trace RDL (ETR) for use in the substrate Silicon Wafer Integrated Fan-out Technology (S-SWIFT ® ) package. S-SWIFT packaging is designed to provide increased input/output (I/O) and circuit density within a reduced footprint and enable high reliability and excellent electrical performance. ETR is created by a novel photolithography technique and a photo-sensitive passivation material with high resolution.Since the process steps of the new ETR are reduced compared to the current process, it can provide a cost effective, multi-layer RDL in a short cycle time using existing infrastructure. ETR possess capabilities of less than 2-μm resolution and multi-layer stacking up to 6 layers. To secure stable processability with high yield, a highly uniform dielectric coating, optimum plating and planarization process were developed. To validate its integrity and reliability, an S-SWIFT package with 4-layers of embedded RDLs with stacked vias was fabricated and JEDEC standard reliability tests were performed. The S-SWIFT package passed the temperature cycling (TC), highly accelerated temperature and humidity stress test (HAST) and the high temperature storage (HTS) testing.
ISSN:	2377-5726
DOI:	10.1109/ECTC51906.2022.00218