Search Results - "CHIH-SIEH TENG"
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1
n+-Poly-to-n+-silicon capacitor structures for single poly analog CMOS and BiCMOS processes
Published in IEEE transactions on electron devices (01-09-1989)Get full text
Journal Article -
2
Modeling the voltage coefficient of linear MOS capacitor
Published in IEEE transactions on electron devices (01-01-1993)“…A one-dimensional model for analyzing the voltage coefficient of the linear MOS capacitor is presented. This model takes into account the capacitances and the…”
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Journal Article -
3
Submicron Large-Angle-Tilt Implanted Drain technology for mixed-signal applications
Published in Proceedings of 1994 IEEE International Electron Devices Meeting (1994)“…This paper reports the use of LATID in submicron MOS technology to improve both analog and digital device performance and reliability. It is demonstrated that…”
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Conference Proceeding -
4
Ion beam shadowing effect in submicromometer large-angle-tilt implanted drain (latid) MOSFETs
Published in Solid-state electronics (1995)Get full text
Journal Article -
5
n super(+)-poly-to-n super(+)-silicon capacitor structures for single-poly analog CMOS and BiCMOS processes
Published in IEEE transactions on electron devices (01-01-1989)“…n super(+)-Poly-to-n super(+)-silicon precision capacitor structures formed by utilizing an n super(+) phosphorus implant and an oxide layer grown…”
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Journal Article -
6
Ion beam shadowing effect in submicrometer large-angle-tilt implanted drain (LATID) MOSFETs
Published in Solid-state electronics (01-07-1995)“…An orientation-dependent device characteristic in LATID MOSFETs is reported. By controlled device fabrication splits, it is confirmed that the…”
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Journal Article -
7
Analog characteristics of drain engineered submicron MOSFETs for mixed-signal applications
Published in Solid-state electronics (1995)“…Drain engineered MOSFETs are compared in terms of their impact on analog performance for submicron mixed-signal applications. The high energy implanted lightly…”
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Journal Article -
8
INFRARED EXTRINSIC MOSFET DETECTORS WITH AND WITHOUT MEMORY, BASED UPON EPITAXIAL SILICON/GERMANIUM ALLOY
Published 01-01-1979Get full text
Dissertation -
9
A CMOS process for mixed mode signal design
Published in Southcon/96 Conference Record (1996)“…In this paper we describe a modular approach to convert digital CMOS process for mixed-signal CMOS applications by incorporating LATID NMOSFET, HALO PMOSFET,…”
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Conference Proceeding -
10
AIDE (Angle-Implanted Drain and Emitter): A BiCMOS technology module for mixed-signal applications
Published in Proceedings of Bipolar/Bicmos Circuits and Technology Meeting (1995)“…Increased mixed-signal device performance and reliability in a BiCMOS technology is achieved by using Angle-Implanted Drain and Emitter (AIDE) technology. An…”
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Conference Proceeding -
11
Hot-electron-induced degradation of conventional, minimum overlap, LDD and DDD N-channel MOSFETs
Published in IEEE circuits and devices magazine (01-03-1988)“…Substrate current characteristics of conventional minimum overlap, DDD (double-diffused drain), and LDD (lightly doped drain) n-channel MOSFETs with various…”
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Journal Article