Search Results - "Butler, K.M."

Minimizing power consumption in scan testing: pattern generation and DFT techniques by Butler, K.M., Saxena, J., Jain, A., Fryars, T., Lewis, J., Hetherington, G.

“…It is a well-known phenomenon that test power consumption may exceed that of functional operation. ICs have been observed to fail at specified minimum…”
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Scan-based transition fault testing - implementation and low cost test challenges by Saxena, J., Butler, K.M., Gatt, J., Raghuraman, R., Kumar, S.P., Basu, S., Campbell, D.J., Berech, J.

“…The semiconductor industry as a whole is growing increasingly concerned about the possible presence of delay-inducing defects. There exist structured test…”
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An analysis of power reduction techniques in scan testing by Saxena, J., Butler, K.M., Whetsel, L.

“…Power consumption during scan testing is becoming a concern. Circuit switching activity during scan shifting is high and results in high average and…”
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Human IFNAR2 deficiency: Lessons for antiviral immunity by Duncan, Christopher J A, Mohamad, Siti M B, Young, Dan F, Skelton, Andrew J, Leahy, T Ronan, Munday, Diane C, Butler, Karina M, Morfopoulou, Sofia, Brown, Julianne R, Hubank, Mike, Connell, Jeff, Gavin, Patrick J, McMahon, Cathy, Dempsey, Eugene, Lynch, Niamh E, Jacques, Thomas S, Valappil, Manoj, Cant, Andrew J, Breuer, Judith, Engelhardt, Karin R, Randall, Richard E, Hambleton, Sophie

“…Type I interferon (IFN-α/β) is a fundamental antiviral defense mechanism. Mouse models have been pivotal to understanding the role of IFN-α/β in immunity,…”
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The bright extragalactic ALMA redshift survey (BEARS) I: redshifts of bright gravitationally lensed galaxies from the Herschel ATLAS by Urquhart, S A, Bendo, G J, Serjeant, S, Bakx, T, Hagimoto, M, Cox, P, Neri, R, Lehnert, M, Sedgwick, C, Weiner, C, Dannerbauer, H, Amvrosiadis, A, Andreani, P, Baker, A J, Beelen, A, Berta, S, Borsato, E, Buat, V, Butler, K M, Cooray, A, De Zotti, G, Dunne, L, Dye, S, Eales, S, Enia, A, Fan, L, Gavazzi, R, González-Nuevo, J, Harris, A I, Herrera, C N, Hughes, D, Ismail, D, Ivison, R, Jin, S, Jones, B, Kohno, K, Krips, M, Lagache, G, Marchetti, L, Massardi, M, Messias, H, Negrello, M, Omont, A, Perez-Fournon, I, Riechers, D A, Scott, D, Smith, M W L, Stanley, F, Tamura, Y, Temi, P, Vlahakis, C, Weiß, A, van der Werf, P, Verma, A, Yang, C, Young, A J

“…ABSTRACT We present spectroscopic measurements for 71 galaxies associated with 62 of the brightest high-redshift submillimetre sources from the Southern fields…”
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Guest Editor's Introduction: ITC Helps Get More Out of Test by Butler, K.M.

“…This special section, along with the International Test Conference 2006, highlights the value that test adds to the electronics manufacturing business. It…”
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Local At-Speed Scan Enable Generation for Transition Fault Testing Using Low-Cost Testers by Ahmed, Nisar, Tehranipoor, Mohammad, Ravikumar, C. P., Butler, Kenneth M.

“…The LOS technique offers significant advantages over the LOC in terms of coverage and pattern count, but since it requires the scan enable (SEN) signal to…”
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A case study of ir-drop in structured at-speed testing by Saxena, J., Butler, K.M., Jayaram, V.B., Kundu, S., Arvind, N.V., Sreeprakash, P., Hachinger, M.

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Multidimensional Test Escape Rate Modeling by Butler, K.M., Carulli, J.M., Saxena, J., Nahar, A., Daasch, W.R.

“…Today's SoC designs contain many types of circuitry, each with various test types. This article revisits the classic test escape models and highlights their…”
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A case study on the implementation of the Illinois Scan Architecture by Hsu, F.F., Butler, K.M., Patel, J.H.

“…Scan based test techniques offer a very efficient alternative to achieve high fault coverage when compared to functional pattern testing. As circuit sizes grow…”
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At-speed structural test: Getting more real every day by Butler, K.M.

“…The panel deals with the question of whether or not it is possible to rely solely on structural test techniques to fully test an integrated circuit (IC). The…”
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Quality improvement and cost reduction using statistical outlier methods by Nahar, A., Butler, K.M., Carulli, J.M., Weinberger, C.

“…Quality improvement and cost reduction in the overall IC manufacturing and test processes are being continuously sought. Outlier screening methods can address…”
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Flame retardant mechanism of silica gel/silica by Kashiwagi, Takashi, Gilman, Jeffrey W., Butler, Kathryn M., Harris, Richard H., Shields, John R., Asano, Atsushi

“…Various types of silica, silica gel, fumed silicas and fused silica were added to polypropylene and polyethylene oxide to determine their flame retardant…”
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Defect-oriented testing and defective-part-level prediction by Dworak, J., Wicker, J.D., Lee, S., Grimaila, M.R., Mercer, M.R., Butler, K.M., Stewart, B., Wang, L.-C.

“…After an integrated circuit (IC) design is complete, but before first silicon arrives from the manufacturing facility, the design team prepares a set of test…”
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Guest editors' introduction: Speed test and speed binning for complex ICs by Butler, K.M., Kwang-Ting Cheng, Wang, L.-C.

“…Presents the guest editorial for this issue of the publication…”
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Modeling Test Escape Rate as a Function of Multiple Coverages by Butler, K.M., Carulli, J.M., Saxena, J.

“…The Williams and Brown model has long been the gold standard for estimating test escape rate as a function of yield and fault coverage. However, today's test…”
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C009 Paediatric HIV infection by Butler, K.M.

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Successful Development and Implementation of Statistical Outlier Techniques on 90nm and 65nm Process Driver Devices by Butler, K.M., Subramaniam, S., Nahar, A., Carulli, J.M., Anderson, T.J., Daasch, W.R.

“…Burn-in and the concomitant post-burn-in retest are significant cost adders to the overall IC manufacturing and test process. Methods to reduce burn-in…”
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Power Supply Noise: A Survey on Effects and Research by Tehranipoor, M., Butler, K.M.

“…As technology scales to 32 nm and functional frequency and density continue to rise, PSN effects, which can reduce a circuit's noise immunity and could lead to…”
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Sure you can get to 100 DPPM in deep submicron, but it'll cost ya by Butler, K.M.

“…The sub-100 DPPM numbers in deep submicron is being built, but the tolls is fairly steep. Traditional methods using simple fault models and pass/fail testing…”
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