Search Results - "Burm, Jinwook"
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1
An Ultralow Power Time-Domain Temperature Sensor With Time-Domain Delta-Sigma TDC
Published in IEEE transactions on circuits and systems. II, Express briefs (01-10-2017)“…Without using bipolar transistors, serially connected inverter cells generate clock delay according to temperature. The delay is compared with a reference…”
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Journal Article -
2
11 b 200 MS/s 28‐nm CMOS 2b/cycle successive‐approximation register analogue‐to‐digital converter using offset‐mismatch calibrated comparators
Published in Electronics letters (01-08-2023)“…This letter presents an 11 b 200 MS/s 28 nm CMOS 2b/cycle successive‐approximation register (SAR) analogue‐to‐digital converter (ADC). The offset calibration…”
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3
An Energy-Efficient Frequency-Domain CMOS Temperature Sensor With Switched Vernier Time-to-Digital Conversion
Published in IEEE sensors journal (15-05-2017)“…This paper presents a CMOS smart temperature sensor using a switched Vernier time-to-digital converter to achieve an energy-efficient temperature sensing. The…”
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Journal Article -
4
High Frame-Rate VGA CMOS Image Sensor Using Non-Memory Capacitor Two-Step Single-Slope ADCs
Published in IEEE transactions on circuits and systems. I, Regular papers (01-09-2015)“…This paper proposes a column-parallel two-step single-slope analog-to-digital converter (SS ADC) for high-frame-rate CMOS image sensors. The proposed two-step…”
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5
A 13.5-mW 10-Gb/s 4-PAM Serial Link Transmitter in 0.13- \mu\hbox CMOS Technology
Published in IEEE transactions on circuits and systems. II, Express briefs (01-09-2014)“…A 13.5-mW 10-Gb/s four-level pulse-amplitude modulation (4-PAM) serial link transmitter is presented. To improve the power efficiency, a voltage-mode 4-PAM…”
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6
An Autofocus Sensor With Global Shutter Using Offset-Free Frame Memory
Published in IEEE transactions on circuits and systems. II, Express briefs (01-11-2010)“…An autofocus (AF) sensor with global shutters using offset-free frame memory is presented. A cross-shaped AF sensor array has left and right horizontal arrays…”
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7
Low Power CMOS Image Sensors Using Two Step Single Slope ADC With Bandwidth-Limited Comparators & Voltage Range Extended Ramp Generator for Battery-Limited Application
Published in IEEE sensors journal (15-03-2020)“…This paper proposes a low-power column-parallel two-step single slope Analog-to-Digital Converter (SS ADC) and voltage range tuned ramp generator for low-power…”
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8
A 4-MHz Digitally Controlled Voltage-Mode Buck Converter With Embedded Transient Improvement Using Delay Line Control Techniques
Published in IEEE transactions on circuits and systems. I, Regular papers (01-11-2020)“…In this article, a digitally controlled voltage-mode buck converter with embedded transient improvement using delay line-based control techniques is presented…”
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9
A 30-MHz Voltage-Mode Buck Converter Using Delay-Line-Based PWM Control
Published in IEEE transactions on circuits and systems. II, Express briefs (01-11-2018)“…A 30-MHz voltage-mode buck converter using a delay-line-based pulse-width-modulation controller is proposed in this brief. Two voltage-to-delay cells are used…”
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10
Ultra-low resistive ohmic contacts on n-GaN using Si implantation
Published in Applied physics letters (27-01-1997)“…Implanted ohmic contacts were made on molecular beam epitaxy grown GaN materials. Si was implanted at a doping density of about 4×1020 cm-3 to decrease the…”
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Journal Article -
11
Multi-Stage Reconfigurable RF-DC Converter With Deep- n -Well Biasing Using Body-Isolated MOSFET in 180-nm BCDMOS Process
Published in IEEE transactions on circuits and systems. II, Express briefs (01-10-2023)“…This brief proposes a multi-stage RF-DC converter using body isolation MOSFET with self-biasing at deep-[Formula Omitted]-well of NMOS. Deep-[Formula…”
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12
A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS
Published in IEEE journal of solid-state circuits (01-10-2020)“…This article presents a novel method for frequency tracking based on an extended bang-bang phase detector (XBBPD) in a referenceless clock and data recovery…”
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Journal Article -
13
Multi-Stage Reconfigurable RF-DC Converter with deep-n-well biasing using Body Isolated MOSFET in 180nm BCDMOS Process
Published in IEEE transactions on circuits and systems. II, Express briefs (27-06-2023)“…This paper proposes a multi-stage RF-DC converter using body isolation MOSFET with self-biasing at deep-n-well of NMOS. Deep-n-wells of NMOSs are connected to…”
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14
A 24.1 TOPS/W mixed-signal BNN processor in 28-nm CMOS
Published in International journal of electronics (02-08-2024)“…A mixed-signal binarized neural network (BNN) processor for the MNIST image classification is demonstrated based on analogue circuit networks. BNN algorithm…”
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15
Precise Individual Illumination Control of Matrix LED With Bypass Gate Driver and 8-Bit PWM
Published in IEEE transactions on circuits and systems. II, Express briefs (01-11-2024)“…Precise illumination control of matrix light-emitting diode (LED) headlamps is crucial for both energy efficiency in electric vehicles and driver safety…”
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16
75 Å GaN channel modulation doped field effect transistors
Published in Applied physics letters (13-05-1996)“…A III–V nitride modulation doped field effect transistor (MODFET) layer structure grown by organometallic vapor phase epitaxy (OMVPE) on a sapphire substrate…”
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17
A low-complexity fast-locking digital PLL with multi-output bang-bang phase detector
Published in 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) (01-10-2016)“…This paper presents a locking-accelerated DPLL based on multi-output bang-bang phase detector (MOBBPD) with reused most significant bits (MSBs). The bang-bang…”
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Conference Proceeding -
18
A 0.18-$\mu$m CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver
Published in IEEE transactions on circuits and systems. I, Regular papers (01-02-2013)Get full text
Journal Article -
19
A CMOS image sensor with non-memory capacitor two-step single slope ADC for high frame rate
Published in 2015 International SoC Design Conference (ISOCC) (01-11-2015)“…This paper proposes a column-parallel two-step Single-Slope Analog-to-Digital Converter (SS ADC) for high-frame-rate CMOS image sensors. The proposed two-step…”
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Conference Proceeding -
20
Time-domain temperature sensor using two stage vernier type time to digital converter for mobile application
Published in 2012 International SoC Design Conference (ISOCC) (01-11-2012)“…This paper presents a time-domain temperature sensor using two stage vernier type time to digital converter for mobile application. A time-domain temperature…”
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Conference Proceeding