High-conductance states on a neuromorphic hardware system

Under typical synaptical stimulation, cortical neurons exhibit a total membrane conductance which, compared to a situation without any input spikes, is significantly increased. This results in a shorter membrane time constant and thus in an increased capability of the neuron to detect coincidences i...

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Bibliographic Details
Published in:	2009 International Joint Conference on Neural Networks pp. 1524 - 1530
Main Authors:	Kaplan, B., Bruderle, D., Schemmel, J., Meier, K.
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01-06-2009
Subjects:	Biomembranes Capacitance Extracellular In vitro Neural network hardware Neural networks Neuromorphics Neurons Testing Very large scale integration
Online Access:	Get full text
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Summary:	Under typical synaptical stimulation, cortical neurons exhibit a total membrane conductance which, compared to a situation without any input spikes, is significantly increased. This results in a shorter membrane time constant and thus in an increased capability of the neuron to detect coincidences in its synaptic input. For this study, a neuromorphic hardware device was utilized, which does not provide direct access to its membrane conductances. Motivated by the aim of finding biologically realistic configuration regimes for the chip operation, a purely spike-based method for the estimation of membrane conductances is presented, allowing to test the hardware membrane dynamics. A proof of principle is given by pure software simulations. Hardware results are presented which illustrate the functionality of the method and show the possibility to generate high-conductance states in the utilized VLSI neurons. In the final section, limits and useful implications of the proposed method are discussed.
ISBN:	142443548X 9781424435487
ISSN:	2161-4393 2161-4407
DOI:	10.1109/IJCNN.2009.5178951