Search Results - "Brezzo, Bernard"

TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip by Akopyan, Filipp, Sawada, Jun, Cassidy, Andrew, Alvarez-Icaza, Rodrigo, Arthur, John, Merolla, Paul, Imam, Nabil, Nakamura, Yutaka, Datta, Pallab, Gi-Joon Nam, Taba, Brian, Beakes, Michael, Brezzo, Bernard, Kuang, Jente B., Manohar, Rajit, Risk, William P., Jackson, Bryan, Modha, Dharmendra S.

“…The new era of cognitive computing brings forth the grand challenge of developing systems capable of processing massive amounts of noisy multisensory data…”
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A million spiking-neuron integrated circuit with a scalable communication network and interface by Merolla, Paul A., Arthur, John V., Alvarez-Icaza, Rodrigo, Cassidy, Andrew S., Sawada, Jun, Akopyan, Filipp, Jackson, Bryan L., Imam, Nabil, Guo, Chen, Nakamura, Yutaka, Brezzo, Bernard, Vo, Ivan, Esser, Steven K., Appuswamy, Rathinakumar, Taba, Brian, Amir, Arnon, Flickner, Myron D., Risk, William P., Manohar, Rajit, Modha, Dharmendra S.

“…Inspired by the brain's structure, we have developed an efficient, scalable, and flexible non–von Neumann architecture that leverages contemporary silicon…”
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A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons by Seo, J., Brezzo, B., Liu, Y., Parker, B. D., Esser, S. K., Montoye, R. K., Rajendran, B., Tierno, J. A., Chang, L., Modha, D. S., Friedman, D. J.

“…Efforts to achieve the long-standing dream of realizing scalable learning algorithms for networks of spiking neurons in silicon have been hampered by (a) the…”
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A Hardware/Software Approach for Database Query Acceleration with FPGAs by Sukhwani, Bharat, Thoennes, Mathew, Min, Hong, Dube, Parijat, Brezzo, Bernard, Asaad, Sameh, Dillenberger, Donna

“…Complex analytics queries often involve expensive operations that may require large computational runtimes leading to slow query responsiveness and hampering…”
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Database Analytics: A Reconfigurable-Computing Approach by Sukhwani, Bharat, Hong Min, Thoennes, Mathew, Dube, Parijat, Brezzo, Bernard, Asaad, Sameh, Dillenberger, Donna Eng

“…Businesses are experiencing a growing need for performing real-time analytics on ever-increasing enterprise data. While providing useful business insights and…”
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Database analytics acceleration using FPGAs by Sukhwani, Bharat, Hong Min, Thoennes, Mathew, Dube, Parijat, Iyer, Balakrishna, Brezzo, Bernard, Dillenberger, Donna, Asaad, Sameh

“…Business growth and technology advancements have resulted in growing amounts of enterprise data. To gain valuable business insight and competitive advantage,…”
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Large Payload Streaming Database Sort and Projection on FPGAs by Sukhwani, Bharat, Thoennes, Mathew, Hong Min, Dube, Parijat, Brezzo, Bernard, Asaad, Sameh, Dillenberger, Donna

“…In recent years, real-time analytics has seen widespread adoption in the business world. While it provides useful business insights and improved market…”
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Artificial brains. A million spiking-neuron integrated circuit with a scalable communication network and interface by Merolla, Paul A, Arthur, John V, Alvarez-Icaza, Rodrigo, Cassidy, Andrew S, Sawada, Jun, Akopyan, Filipp, Jackson, Bryan L, Imam, Nabil, Guo, Chen, Nakamura, Yutaka, Brezzo, Bernard, Vo, Ivan, Esser, Steven K, Appuswamy, Rathinakumar, Taba, Brian, Amir, Arnon, Flickner, Myron D, Risk, William P, Manohar, Rajit, Modha, Dharmendra S

“…Inspired by the brain's structure, we have developed an efficient, scalable, and flexible non-von Neumann architecture that leverages contemporary silicon…”
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Real-time scalable cortical computing at 46 giga-synaptic OPS/watt with ~100× speedup in time-to-solution and ~100,000× reduction in energy-to-solution by Cassidy, Andrew S., Alvarez-Icaza, Rodrigo, Akopyan, Filipp, Sawada, Jun, Arthur, John V., Merolla, Paul A., Datta, Pallab, Tallada, Marc Gonzalez, Taba, Brian, Andreopoulos, Alexander, Amir, Arnon, Esser, Steven K., Kusnitz, Jeff, Appuswamy, Rathinakumar, Haymes, Chuck, Brezzo, Bernard, Moussalli, Roger, Bellofatto, Ralph, Baks, Christian, Mastro, Michael, Schleupen, Kai, Cox, Charles E., Inoue, Ken, Millman, Steve, Imam, Nabil, McQuinn, Emmett, Nakamura, Yutaka Y., Vo, Ivan, Guo, Chen, Nguyen, Don, Lekuch, Scott, Asaad, Sameh, Friedman, Daniel, Jackson, Bryan L., Flickner, Myron D., Risk, William P., Manohar, Rajit, Modha, Dharmendra S.

“…Drawing on neuroscience, we have developed a parallel, event-driven kernel for neurosynaptic computation, that is efficient with respect to computation,…”
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High-Throughput, Lossless Data Compresion on FPGAs by Sukhwani, B, Abali, B, Brezzo, B, Asaad, S

“…Loss less compression is often used before writing data to a storage medium or transmitting across a transmission medium. Compression aids by saving storage…”
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Single-chip 4×500-MBd CMOS transceiver by Widmer, A.X., Wrenner, K., Ainspan, H.A., Parker, B., Austruy, P., Brezzo, B., Haen, A.-M., Ewen, J.F., Soyuer, M., Blanc, A., Abbiate, J.-C., Deutsch, A., Hyun J. Shin

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