Search Results - "Bhakthavatchalu, Ramesh"

Implementation of SHA 256 using MATLAB and on FPGA by the Application of Block Chain Concepts by Thomas, Annu, Bhakthavatchalu, Ramesh

“…In recent years block chain technology have gained popularity because of its secure and decentralized architecture. Block chain is a fault-tolerant distributed…”
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A comparison of pipelined parallel and iterative CORDIC design on FPGA by Bhakthavatchalu, Ramesh, Sinith, M S, Nair, Parvathi, Jismi, K

“…Many hardware efficient algorithms exists for hardware signal processing architecture. Among these algorithm is a set of shift-add algorithms collectively…”
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Design of reconfigurable LFSR for VLSI IC testing in ASIC and FPGA by Devika, K. N., Bhakthavatchalu, Ramesh

“…This paper focus on the design of a reconfigurable Linear Feedback Shift Register (LFSR) for Very Large Scale Integration (VLSI) Integrated Circuit (IC)…”
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A Proposal for Programmable Pattern Generator and its FPGA implementation by Somanathan, Geethu Remadevi, Bhakthavatchalu, Ramesh

“…The pseudo random sequences generated from the Linear Feedback Shift Register (LFSR) can be used to construct in Built-In Self-Test (BIST) modules as well as…”
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Programmable Pseudorandom Pattern Generator Based on LFSR by Madhav, Akella, P, Hridya, S, Geethu R, Bhakthavatchalu, Ramesh

“…The testing of Integrated Circuits (ICs) is a critical process to ensure their reliability and functionality. Pseudo-random pattern generation has emerged as…”
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High Performance and Low Power Axi-Lite 4 Master Controller Using System Verilog by MS, Muhammed Salman, Bhakthavatchalu, Ramesh

“…Digital design and System-on-Chip (SoC) development practices frequently employ the Advanced eXtensible Interface (AXI) protocol. It acts as an interconnect…”
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Performance Analysis of Different Types of Delay based PUFs by Gireesh, Akshay, Bhakthavatchalu, Ramesh, Devika, K N

“…Physical Unclonable Functions (PUFs) present a fresh answer to security concerns due to their intrinsic unpre-dictability. However, coming to newly created PUF…”
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Boundary Scan Security Models using Cryptographic Primitives by Paulson, Loyied, Bhakthavatchalu, Ramesh, N, Devika K

“…Various security issues associated with current boundary scan techniques and a new technique to overcome these issues is addressed here. Many of the challenges…”
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A Proposal for Design and Implementation of a Low Power Test Pattern Generator for BIST Applications by Mukherjee, Malini, R S, Geethu, Bhakthavatchalu, Ramesh

“…With the increasing demand of embedding more functions in VLSI chips, it has become vital for the engineers to come up with a solution that necessitates…”
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Design and Implementation of Programmable Multiple Input Signature Register by Agnihotri, Ashutosh, Geethu, R S, Bhakthavatchalu, Ramesh

“…This work concentrates on the design and implementation of Programmable Multiple Input Signature Register (MISR). The advancement going on in Very Large Scale…”
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A Programmable and Parameterisable Reseeding Linear Feedback Shift Register by Saleem, Hudhaifah Ibn, Geethu, Rs, Bhakthavatchalu, Ramesh

“…In this paper, we will design and implement a programmable and parameterizable Linear Feedback Shift Register (LFSR) for VLSI IC testing. The LFSR is used in…”
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Hamming 3 algorithm for improving the reliability of SRAM based FPGAs by Sooraj, S., Bhakthavatchalu, Ramesh

“…This work focuses the use of hamming 3 algorithm, for Finite State Machines (FSM) in Static RAM based FPGAs. SEUs (Single Event Upsets) can affect the proper…”
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FPGA based delay PUF implementation for security applications by Kumar, Mahin Anil, Bhakthavatchalu, Ramesh

“…A new type of authentication of a device or chip called Physically Unclonable functions (PUFs) is developed such that, with the built-in manufacturing…”
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PUF Based Cryptographic Key Generation by S, Samra S, N, Sreehari K, Bhakthavatchalu, Ramesh

“…For data storage and protection, encryption is an important standard. A secret key is required in order to encrypt or decrypt data. This key is typically…”
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Implementation of Efficient Hybrid Encryption Technique by Mammenp, Asha, KN, Sreehari, Bhakthavatchalu, Ramesh

“…Security troubles of restricted sources communications are vital. Existing safety answers aren't sufficient for restricted sources gadgets in phrases of Power…”
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Design of interactive paging and locating device for GPS applications by Muraleedharan, Anjana, Bhakthavatchalu, Ramesh

“…This paper proposes design of an interactive paging and locating device. It is a standalone device which integrates the modern communication methods in it. It…”
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Hardware Security Solutions for Blockchain's Consensus Mechanisms by B, Anagha, KN, Devika, Bhakthavatchalu, Ramesh

“…At present, Blockchain is one of the biggest sought after research-oriented field that finds application in numerous areas including finance, cryptocurrency,…”
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Programmable MISR modules for logic BIST based VLSI testing by Devika, K. N., Bhakthavatchalu, Ramesh

“…This paper focus on the design of Programmable MISR(Multiple Input Signature Register) modules for Logic BIST based Very Large Scale Integration(VLSI)…”
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Implementation of hybrid cryptosystem using DES and MD5 by Sreehari, K. N., Bhakthavatchalu, Ramesh

“…Cryptographic techniques offers authenticity, Integrity and secrecy during data transmission. In this paper, a hybrid cryptosystem, which uses both symmetric…”
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Design of efficient programmable test-per-scan logic BIST modules by Devika, K. N., Bhakthavatchalu, Ramesh

“…This paper focus on the design of Programmable Logic BIST structures for Very Large Scale Integration (VLSI) Integrated Circuit(IC) testing. The advancements…”
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